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si4202dy-t1-ge3

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by Ray

Vishay Intertech MOSFET, SO-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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SI4202DY-T1-GE3

Vishay Intertech · MOSFET · SO-8

SI4202DY-T1-GE3 from Vishay Intertech, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of N-channel MOSFET #1. Body-diode anode; typically tied to ground or the switching-node return for the first FET.
2 G1 input Gate of N-channel MOSFET #1. VGS(th) = 1.0-2.5 V; absolute maximum VGS = ±20 V. Drives the channel of the first FET.
3 S2 passive Source of N-channel MOSFET #2. Body-diode anode of the second FET.
4 G2 input Gate of N-channel MOSFET #2. VGS(th) = 1.0-2.5 V; absolute maximum VGS = ±20 V.
5 D2 passive Drain of N-channel MOSFET #2. VDS max = 30 V. One of two paralleled drain pins (5 and 6) for thermal and current sharing on FET #2.
6 D2 passive Drain of N-channel MOSFET #2 (paralleled with pin 5). VDS max = 30 V.
7 D1 passive Drain of N-channel MOSFET #1 (paralleled with pin 8). VDS max = 30 V.
8 D1 passive Drain of N-channel MOSFET #1 (paralleled with pin 7). VDS max = 30 V.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SO-8
Category Transistors
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SI4202DY-T1-GE3

CAD (KiCad official)

  • Symbol: SI4202DY-T1-GE3
  • Footprint: Package_SO:TI_SO-PowerPAD-8
  • 3D model: SO-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (9 pp, sha256 6af85b66f5bafb58, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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