SGM6232YPS8G from SGMICRO, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	BS	passive	High-side gate drive boost input. Supplies the driver for the internal high-side N-channel MOSFET. Connect a 10nF or greater capacitor from SW to BS to power the high-side switch. A 10Ω resistor between SW and the BS cap is strongly recommended to reduce SW spike voltage.
2	IN	power_in	Power input. Supplies the IC and the step-down converter high-side switch. Drive with a 4.5V to 38V source. Bypass to GND with a sufficiently large ceramic capacitor (22µF typical) to eliminate noise on the input.
3	SW	power_out	Power switching output. Switching node that supplies power to the output through the external LC filter. A capacitor is required from SW to BS to power the high-side switch.
4	GND	power_in	Ground. Connect the exposed pad on the backside to pin 4.
5	FB	input	Feedback input. Regulated to 0.8V (typ). Connect to the tap of the resistor divider between output and ground to set the output voltage using VOUT = 0.8 × (R1+R2)/R2.
6	COMP	output	Compensation node for the regulation control loop. Connect a series RC network from COMP to GND to compensate the transconductance error amplifier; an additional capacitor from COMP to GND may be required.
7	EN	input	Enable input. Digital input that turns the regulator on/off (VIH ≥ 1.2V, VIL ≤ 0.4V). Drive high to enable, low to disable; output is discharged when the IC is off. Leave unconnected for automatic startup (internal 0.8-2µA pull-up).
8	SS	input	Soft-start control input. Connect a capacitor from SS to GND to set the soft-start period (tSS = 100kΩ × CSS; 0.1µF → 10ms). Leave unconnected to disable the external soft-start feature.
EP	GND	power_in	Power ground exposed pad on the backside of the SOIC-8 package. Must be connected to the GND plane for proper electrical grounding and thermal performance (θJA = 50°C/W).

Key specifications

Parameter	Value
Manufacturer	SGMICRO
Package	SOIC-8-EP
Category	PMIC
Pins	9

Ordering variants

Same part, different packaging or reel option.

SGM6232YPS8G/TR

CAD (KiCad official)

Symbol: SGM6232YPS8G
Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm
3D model: SOIC-8-EP (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`sgm6232yps8g.step`	125 KB	You want the bare part, or you mark your own boards.
`sgm6232yps8g-etched.step`	3.0 MB	You want the part with `SGM6232YPS8G` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 708 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: SGMICRO datasheet (14 pp, sha256 cce68c58d20a7698, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF