component
SGM2054XTD10G
Public Unreviewedby Ray
SGMICRO Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, TDFN-10L(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSGM2054XTD10G
SGMICRO · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TDFN-10L(3x3)
SGM2054XTD10G from SGMICRO, in a TDFN-10L(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REFIN | input | Reference Input Pin. Sets the target reference voltage (0.5V to 1.8V range). REFOUT tracks REFIN, and VO regulates to REFOUT. |
| 2 | VLDOIN | power_in | Regulator Supply Voltage Pin (1.1V to 3.5V). Provides the input power to the LDO output stage. Recommended to use a ceramic capacitor with minimum effective capacitance of 15µF from VLDOIN to ground. |
| 3 | VO | power_out | Regulator Output Pin. Sinks and sources current to hold the DDR termination rail at REFOUT. Recommended output capacitor effective capacitance is 20µF to 100µF. |
| 4 | PGND | power_in | Regulator Power Ground. Return path for the output stage current; should be tied to the PCB ground plane. |
| 5 | VOSNS | input | Voltage Sense Input Pin. Connect to the remote voltage sensing point of the load powered by VO for accurate regulation and to inform the power-good comparator. |
| 6 | REFOUT | output | Buffered Reference Output Pin (±10mA). Buffers REFIN and provides the reference used by the VO regulator loop. Recommended output capacitor effective capacitance is 0.1µF to 1µF. |
| 7 | EN | input | Enable Pin. Drive EN high (≥1V) to turn on the regulator; drive EN low (≤0.5V) to shut down. When EN is below 0.3V the internal discharge path pulls VO down. |
| 8 | GND | power_in | Signal Ground. Return for the analog/control circuitry. |
| 9 | PGOOD | output | Power-Good Indicator Output Pin. Open-drain output that is active high (via external pull-up) when the VO/VOSNS voltage is within the ±20% PGOOD window around REFOUT. Requires an external pull-up resistor (e.g. 100kΩ to VIN). |
| 10 | VIN | power_in | Input Voltage Supply Pin (2.375V to 3.5V). Powers the control circuitry. Recommended to use a ceramic capacitor with minimum effective capacitance of 1µF from VIN to ground. |
| EP | GND | power_in | Exposed Pad. Connect to GND internally; must be connected to a large ground plane on the PCB to maximize thermal performance. Not an electrical connection point on the die. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SGMICRO |
| Package | TDFN-10L(3x3) |
| Category | PMIC |
| Pins | 11 |
Ordering variants
Same part, different packaging or reel option.
SGM2054XTD10G/TR
CAD (KiCad official)
- Symbol:
SGM2054XTD10G - Footprint:
Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm - 3D model: TDFN-10L(3x3) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SGMICRO datasheet (14 pp, sha256
a6699b6ea61e1847, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).