component
SCT2A10ASTER
Public Unreviewedby Ray
SCT DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownSCT2A10ASTER
SCT · DC-DC Converters · ESOP-8
SCT2A10ASTER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Device ground. Connect to the ground plane; the exposed thermal pad (pin 9) must also be tied to this net for proper operation and thermal dissipation. |
| 2 | VIN | power_in | Input supply voltage, 4.5 V to 100 V. Connect a local bypass capacitor from VIN to GND with the shortest possible path to the high-frequency bypass capacitor and GND. |
| 3 | EN | input | Enable input with internal ~1-4 µA pull-up current source. Pull below 1.05 V to disable, float or tie to VIN to enable. A resistor divider from VIN to GND on EN sets the programmable input UVLO threshold (VEN_H ≈ 1.21 V). |
| 4 | RT | input | Oscillator frequency-set pin. Connect a resistor from RT to GND to program the switching frequency in the 300 kHz to 800 kHz range (e.g. R_RT = 500 kΩ → ~500 kHz). |
| 5 | FB | input | Feedback input to the internal transconductance error amplifier. An external resistor divider from VOUT to GND sets the output voltage; FB is regulated to the internal 0.8 V (±1%) reference. |
| 6 | NC | unconnected | No internal connection. Leave floating or tie to a static net per PCB convenience. |
| 7 | BST | power_in | Bootstrap supply for the high-side MOSFET gate driver. Connect a 0.1 µF capacitor from BST to SW; the cap is refreshed when the low-side MOSFET is on or SW is low. BOOT-SW rating 6 V max. |
| 8 | SW | output | Switch node output of the internal power stage. Connect to the external power inductor. Rated -1 V to 105 V absolute maximum. |
| 9 | Thermal Pad | power_in | Exposed thermal pad on the underside of the ESOP-8 package. Electrically must be connected to GND (pin 1) and soldered to a PCB ground plane for proper operation and optimized thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
SCT2A10ASTER
CAD (KiCad official)
- Symbol:
SCT2A10ASTER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sct2a10aster.step |
125 KB | You want the bare part, or you mark your own boards. |
sct2a10aster-etched.step |
2.3 MB | You want the part with SCT2A10ASTER already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 585 faces against 152 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SCT datasheet (18 pp, sha256
1657cc7e7137f11d, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).