component
SCT2630STER
Public Unreviewedby Ray
SCT DC-DC Converters, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownSCT2630STER
SCT · DC-DC Converters · ESOP-8
SCT2630STER from SCT, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BOOT | passive | Bootstrap supply for the high-side power MOSFET gate driver. Connect a 0.1uF capacitor from BOOT to SW; the cap is charged when SW is low. Absolute max 72V; BOOT-SW absolute max 6V. |
| 2 | VIN | power_in | Input supply voltage, 4.2V to 60V operating (absolute max 65V). Connect a local high-frequency bypass capacitor from VIN to GND with the shortest possible path. |
| 3 | EN | input | Enable pin with internal 1uA/4uA pull-up current source. Pull below 1.05V to disable, above 1.2V to enable. May float or tie to VIN to auto-enable; a VIN-to-GND resistor divider on EN sets a programmable UVLO threshold. Absolute max 65V. |
| 4 | RT/CLK | bidirectional | Sets internal oscillator frequency via a resistor to GND (100 kHz-1.2 MHz), or accepts an external clock for PLL sync (100 kHz-1.2 MHz, high ≥2V, low ≤0.4V, pulse width >80ns). Typical pin voltage 0.5V in RT mode. If external clock stops, mode reverts automatically to resistor-programmed frequency. Absolute max 6V. |
| 5 | FB | input | Inverting input of the trans-conductance error amplifier. External resistor divider from VOUT to GND ties to FB; device regulates FB to the internal 0.8V (±1%) reference. Absolute max 6V. |
| 6 | COMP | output | Error amplifier output for external loop compensation network (typ. series R-C to GND). COMP clamps at ~2.25V high and ~0.47V low; EA gm = 240 µA/V, source/sink current 24 µA. Absolute max 6V. |
| 7 | GND | power_in | Device ground return. Connect directly to the input bypass capacitor return with a low-impedance path; tie to the exposed thermal pad. |
| 8 | SW | power_out | Switching node - source of the internal 220mΩ high-side MOSFET. Connect to the external power inductor and (for asynchronous operation) the anode of a Schottky freewheeling diode. Absolute max range -1V to 65V. |
| 9 | Thermal Pad | power_in | Exposed die-pad for heat dissipation. Electrically connected to GND (pin 7) and must be soldered to the PCB ground plane for proper operation and optimum thermal performance (θJA ≈ 42 °C/W). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | SCT |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
SCT2630STER
CAD (KiCad official)
- Symbol:
SCT2630STER - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
sct2630ster.step |
193 KB | You want the bare part, or you mark your own boards. |
sct2630ster-etched.step |
2.3 MB | You want the part with SCT2630STER already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 550 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: SCT datasheet (22 pp, sha256
9efec8f7038ae171, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).