Adds a full UART to a host that talks I2C or SPI, so a microcontroller short on serial ports gains a hardware UART with a 64-byte transmit and receive FIFO. The bridge handles baud rates to 5 Mbps, full modem control lines, and hardware or software flow control, offloading the timing from the host. Eight of its pins double as GPIO, and an IRQ line signals events. A pin selects I2C or SPI. A common way to add a reliable UART to an I2C or SPI system.

Pinout

Pin	Name	Type	Function
1	CTS	input	UART clear-to-send input (active LOW). A logic 0 indicates the modem/DTE is ready to accept transmit data. Status is readable via MSR[4]; only affects transmit when auto-CTS is enabled in EFR[7].
2	TX	output	UART transmitter serial output. Disabled and internally looped back to RX during local Loopback mode.
3	RX	input	UART receiver serial input. Disabled in local Loopback mode where TX is internally routed to RX.
4	RESET	input	Device hardware reset, active LOW. See Section 7.4.1 for reset behavior.
5	XTAL1	input	Crystal input or external clock input. A crystal can be tied between XTAL1 and XTAL2 to form the internal oscillator, or an external clock can drive this pin directly.
6	XTAL2	output	Crystal oscillator output; used together with XTAL1 when a crystal is fitted.
7	VDD	power_in	Power supply, 2.5 V or 3.3 V nominal.
8	I2C/SPI	input	Interface select. Tie HIGH for I2C-bus target mode, LOW for SPI target mode. Determines the function of pins 9-13.
9	CS/A0	input	In SPI mode: SPI chip-select input (Schmitt-trigger, active LOW). In I2C mode: device-address select bit A0 (combines with A1 to program the 7-bit target address; see Table 32).
10	SI/A1	input	In SPI mode: SPI serial data input (MOSI). In I2C mode: device-address select bit A1 (combines with A0 to program the target address).
11	SO	tri_state	SPI serial data output (MISO), 3-stateable. In I2C mode this pin is undefined and must be left unconnected.
12	SCL/SCLK	input	Serial clock input. Acts as I2C-bus SCL when I2C is selected, or SPI SCLK when SPI is selected (SPI Mode 0, up to 4 Mbit/s on SC16IS750).
13	SDA	bidirectional	I2C-bus data line, open-drain, when I2C interface is selected. If SPI is selected this pin is undefined and must be tied to VSS.
14	IRQ	output	Interrupt output, open-drain, active LOW. Requires an external pull-up to VDD (~1 kΩ at 3.3 V, ~1.5 kΩ at 2.5 V). Asserts on enabled sources in the IER (line status, RX data available, TX empty, modem status, GPIO change).
15	GPIO0	bidirectional	Programmable I/O pin with active pull-up (see Table 36). Direction, level, and interrupt behavior are set via the IODir/IOState/IOIntEna registers.
16	GPIO1	bidirectional	Programmable I/O pin with active pull-up (see Table 36).
17	GPIO2	bidirectional	Programmable I/O pin with active pull-up (see Table 36).
18	GPIO3	bidirectional	Programmable I/O pin with active pull-up (see Table 36).
19	VSS	power_in	Device ground reference.
20	GPIO4/DSR	bidirectional	Programmable I/O pin, or modem DSR (Data Set Ready) input. Function is selected by IOControl register bit 1; active pull-up on input.
21	GPIO5/DTR	bidirectional	Programmable I/O pin, or modem DTR (Data Terminal Ready) output. Selected via IOControl bit 1.
22	GPIO6/CD	bidirectional	Programmable I/O pin, or modem CD (Carrier Detect) input. Selected via IOControl bit 1.
23	GPIO7/RI	bidirectional	Programmable I/O pin, or modem RI (Ring Indicator) input. Selected via IOControl bit 1.
24	RTS	output	UART request-to-send output, active LOW. Set by MCR[1] (or automatically driven when auto-RTS is enabled via EFR[6]); can also serve as the RS-485 driver direction-control signal.

Key specifications

Parameter	Value
Type	I2C/SPI-to-UART bridge
Channels	1 UART
FIFO	64 bytes (TX and RX)
Max baud	5 Mbps
GPIO	8 (shared)
Host interface	I2C or SPI (pin-selected)
Supply	2.5-3.6 V
Package	TSSOP-24

Ordering variants

Same part, different packaging or reel option.

SC16IS750IPW (TSSOP-24)
SC16IS750IBS (HVQFN-24)

CAD (KiCad official)

Symbol: Interface_UART:SC16IS750xPW (KiCad official)
Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
3D model: TSSOP-24 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: NXP datasheet (61 pp, sha256 805796f4b2fd33e6, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF