component
RTS5411T-GR
Public Unreviewedby Ray
Realtek Semicon USB Converters, QFN-76(9x9). Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownRTS5411T-GR
Realtek Semicon · USB Converters · QFN-76(9x9)
RTS5411T-GR from Realtek Semicon, in a QFN-76(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RREF | passive | Bandgap reference. Connect an external 6.2K ohm (+/-1%) resistor from this pin to reference GND. |
| 2 | BPWR_DET | input | Upstream VBUS power detection pin. Active High (5V input buffer). 0 = upstream VBUS absent, 1 = upstream VBUS present. |
| 3 | DV11 | power_in | 1.1V power supply for digital circuits. |
| 4 | DV33 | power_in | 3.3V power supply for digital circuits (2.97-3.63V). |
| 5 | DSP2_DP | bidirectional | USB 2.0 D+ signal of Downstream Port 2. |
| 6 | DSP2_DM | bidirectional | USB 2.0 D- signal of Downstream Port 2. |
| 7 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 8 | DSP2_SSTX+ | output | USB 3.2 Gen1x1 SuperSpeed TX+ of Downstream Port 2. |
| 9 | DSP2_SSTX- | output | USB 3.2 Gen1x1 SuperSpeed TX- of Downstream Port 2. |
| 10 | OCP2 | input | Over-current protection flag for downstream port 2. 5V input buffer with internal 10K pull-up (valid in 'power switch' mode). Active low by default (F/W-configurable). 0 = over-current detected. |
| 11 | DSP2_SSRX+ | input | USB 3.2 Gen1x1 SuperSpeed RX+ of Downstream Port 2. |
| 12 | DSP2_SSRX- | input | USB 3.2 Gen1x1 SuperSpeed RX- of Downstream Port 2. |
| 13 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 14 | DSP3_SSTX+ | output | USB 3.2 Gen1x1 SuperSpeed TX+ of Downstream Port 3. |
| 15 | DSP3_SSTX- | output | USB 3.2 Gen1x1 SuperSpeed TX- of Downstream Port 3. |
| 16 | OCP3 | input | Over-current protection flag for downstream port 3. 5V input buffer with internal 10K pull-up (valid in 'power switch' mode). Active low by default. 0 = over-current detected. |
| 17 | DSP3_SSRX+ | input | USB 3.2 Gen1x1 SuperSpeed RX+ of Downstream Port 3. |
| 18 | DSP3_SSRX- | input | USB 3.2 Gen1x1 SuperSpeed RX- of Downstream Port 3. |
| 19 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 20 | DSP3_DP | bidirectional | USB 2.0 D+ signal of Downstream Port 3. |
| 21 | DSP3_DM | bidirectional | USB 2.0 D- signal of Downstream Port 3. |
| 22 | DV33 | power_in | 3.3V power supply for digital circuits. |
| 23 | DSP4_DP | bidirectional | USB 2.0 D+ signal of Downstream Port 4. |
| 24 | DSP4_DM | bidirectional | USB 2.0 D- signal of Downstream Port 4. |
| 25 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 26 | DSP4_SSTX+ | output | USB 3.2 Gen1x1 SuperSpeed TX+ of Downstream Port 4. |
| 27 | DSP4_SSTX- | output | USB 3.2 Gen1x1 SuperSpeed TX- of Downstream Port 4. |
| 28 | OCP4 | input | Over-current protection flag for downstream port 4. 5V input buffer with internal 10K pull-up. Active low by default. 0 = over-current detected. |
| 29 | DSP4_SSRX+ | input | USB 3.2 Gen1x1 SuperSpeed RX+ of Downstream Port 4. |
| 30 | DSP4_SSRX- | input | USB 3.2 Gen1x1 SuperSpeed RX- of Downstream Port 4. |
| 31 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 32 | GPIO0/SMBCL | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port transmit/receive activity. Configurable as the SMBus clock (SMBCL) pin. |
| 33 | GPIO1/SMBDA | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port over-current condition. Configurable as the SMBus data (SMBDA) pin. |
| 34 | GPIO2/SCL | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port transmit/receive activity. Configurable as the I2C clock (SCL) pin. |
| 35 | GPIO3/SDA | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port over-current condition. Configurable as the I2C data (SDA) pin. |
| 36 | GPIO4 | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port transmit/receive activity. Leave floating if unused. |
| 37 | GPIO5 | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port over-current condition. |
| 38 | GPIO6 | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port transmit/receive activity. |
| 39 | GPIO7 | bidirectional | General purpose I/O with weak internal 200K pull-up, 3.3V buffer. Default: LED for downstream port over-current condition. |
| 40 | DSP1_PWR | output | External VBUS power switch enable for downstream port 1. Open-drain output, active low by default (F/W can configure active high; then uses 3.3V push-pull). 0 = VBUS on, 1 = VBUS off. Leave floating if unused. |
| 41 | DSP2_PWR | output | External VBUS power switch enable for downstream port 2. Open-drain, active low by default. 0 = VBUS on, 1 = VBUS off. |
| 42 | DSP3_PWR | output | External VBUS power switch enable for downstream port 3. Open-drain, active low by default. 0 = VBUS on, 1 = VBUS off. |
| 43 | DSP4_PWR | output | External VBUS power switch enable for downstream port 4. Open-drain, active low by default. 0 = VBUS on, 1 = VBUS off. |
| 44 | SCK | output | SPI clock output to external Serial Flash memory. 3.3V bi-directional buffer. |
| 45 | SCS | output | SPI chip-select output to external Serial Flash memory. 3.3V bi-directional buffer. Also sampled at power-on reset as a strap: 0 = execute code from internal ROM, 1 = execute code from external Serial Flash. |
| 46 | MISO | input | SPI data input from external Serial Flash memory. 3.3V bi-directional buffer. |
| 47 | MOSI | output | SPI data output to external Serial Flash memory. 3.3V bi-directional buffer. |
| 48 | DV33 | power_in | 3.3V power supply for digital circuits. |
| 49 | DV11 | power_in | 1.1V power supply for digital circuits. |
| 50 | DV11 | power_in | 1.1V power supply for digital circuits. |
| 51 | SWR_GND | power_in | Reference ground for the internal 1.1V switching regulator. |
| 52 | SWR_OUT | power_out | 5V-to-1.1V internal switching regulator output. Leave floating if internal switching regulator is not used. |
| 53 | SWR_V5_IN | power_in | 5V-to-1.1V switching regulator input (3.1-5.5V). Connect to LDO_V5_IN when internal switching regulator is not used. |
| 54 | LDO_V5_IN | power_in | 5V-to-3.3V internal LDO input (4.5-5.5V). Short to DV33 when on-chip LDO is not used. |
| 55 | V33_OUT | power_out | 3.3V output from the internal 5V-to-3.3V LDO. Short to DV33 when on-chip LDO is not used. |
| 56 | USP_DP | bidirectional | USB 2.0 D+ signal of the Upstream Port. |
| 57 | USP_DM | bidirectional | USB 2.0 D- signal of the Upstream Port. |
| 58 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 59 | USP_SSTX- | output | USB 3.2 Gen1x1 SuperSpeed TX- of the Upstream Port. |
| 60 | USP_SSTX+ | output | USB 3.2 Gen1x1 SuperSpeed TX+ of the Upstream Port. |
| 61 | GND | power_in | Reference ground. |
| 62 | USP_SSRX- | input | USB 3.2 Gen1x1 SuperSpeed RX- of the Upstream Port. |
| 63 | USP_SSRX+ | input | USB 3.2 Gen1x1 SuperSpeed RX+ of the Upstream Port. |
| 64 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 65 | DSP1_SSTX+ | output | USB 3.2 Gen1x1 SuperSpeed TX+ of Downstream Port 1. |
| 66 | DSP1_SSTX- | output | USB 3.2 Gen1x1 SuperSpeed TX- of Downstream Port 1. |
| 67 | OCP1 | input | Over-current protection flag for downstream port 1. 5V input buffer with internal 10K pull-up. Active low by default. 0 = over-current detected. |
| 68 | DSP1_SSRX+ | input | USB 3.2 Gen1x1 SuperSpeed RX+ of Downstream Port 1. |
| 69 | DSP1_SSRX- | input | USB 3.2 Gen1x1 SuperSpeed RX- of Downstream Port 1. |
| 70 | AV11 | power_in | 1.1V power supply for analog circuits. |
| 71 | DSP1_DP | bidirectional | USB 2.0 D+ signal of Downstream Port 1. |
| 72 | DSP1_DM | bidirectional | USB 2.0 D- signal of Downstream Port 1. |
| 73 | DV33 | power_in | 3.3V power supply for digital circuits. |
| 74 | XTLI | input | 12 MHz crystal oscillator input. 3.3V clock interface. |
| 75 | XTLO | output | 12 MHz crystal oscillator output/drive. 3.3V clock interface. |
| 76 | SPWR_DET | input | Self-power detection pin. 5V input buffer, active high. 0 = bus-power setting, 1 = self-power setting. |
| EP | E-PAD | power_in | Exposed thermal pad on the bottom of the package. Must be connected to reference ground for thermal dissipation and electrical grounding. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Realtek Semicon |
| Package | QFN-76(9x9) |
| Category | Interface |
| Pins | 77 |
Ordering variants
Same part, different packaging or reel option.
RTS5411T-GR
CAD (KiCad official)
- Symbol:
RTS5411T-GR - Footprint:
Package_DFN_QFN:QFN-76-1EP_9x9mm_P0.4mm_EP3.8x3.8mm - 3D model: QFN-76(9x9) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Realtek Semicon datasheet (32 pp, sha256
371452f35b4a4904, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).