Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

RT8073GQW

Richtek Tech · DC-DC Converters · WDFN-12(3x3)

RT8073GQW from Richtek Tech, in a WDFN-12(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Compensation node. Error amplifier output; connect an external RC network to GND to set the loop compensation for the current-mode control loop.
2 PGOOD output Power Good open-drain output. High impedance when VFB is within ~94%-106% of VREF (regulated). Internally pulled low during shutdown, thermal shutdown, or VIN under UVLO.
3 SS input Soft-start control. An internal current source charges an external capacitor to build the soft-start ramp (VSS); VFB tracks VSS during startup. Float pin to use the ~800 µs internal soft-start.
4 EN input Chip Enable. Pull high (VIH ≥ 1.5V, ≤ 5.5V) to enable, low (VIL ≤ 0.4V) to disable. Internally pulled up so the pin defaults high when floating.
5 VIN power_in Power input, 2.9V to 5.5V. Supplies both the internal control circuitry and the high-side power MOSFET. Bypass with a low-ESR ceramic capacitor to PGND close to the pin.
6 VIN power_in Power input (tied to pin 5), 2.9V to 5.5V. Supplies the high-side power MOSFET; the two VIN pins should be bypassed together to PGND.
7 BOOT power_in Bootstrap supply for the high-side gate driver. Connect a bootstrap capacitor (typ. 10 nF) between BOOT and LX; the cap is charged from an internal supply when LX is low. Absolute max BOOT-to-LX = 6V.
8 LX power_out Switch node. Common drain of the internal high-side and low-side power MOSFETs; connect to the external inductor. Pins 8/9/10 are tied together internally and must all be connected to carry the 6A switch current.
9 LX power_out Switch node (tied to pins 8 and 10). Connect to the external inductor to carry the up-to-6A switching current.
10 LX power_out Switch node (tied to pins 8 and 9). Connect to the external inductor to carry the up-to-6A switching current.
11 RT input Frequency setting pin. Connect a resistor from RT to GND to set switching frequency (300 kHz to 2 MHz; e.g. RT = 28.7 kΩ → ~1.4 MHz). Floating RT defaults to ~300 kHz.
12 FB input Feedback voltage input. Connect a resistor divider from VOUT to FB to GND; the loop regulates FB to VREF = 0.8V ±1%.
13 PGND power_in Power ground / exposed thermal pad. Return for the low-side power MOSFET and the ground reference for the IC. Must be soldered to a large PCB copper area for thermal dissipation (θJA ≈ 60 °C/W).

Key specifications

Parameter Value
Manufacturer Richtek Tech
Package WDFN-12(3x3)
Category PMIC
Pins 13

Ordering variants

Same part, different packaging or reel option.

  • RT8073GQW
  • RT8073GQWSP

CAD (KiCad official)

  • Symbol: RT8073GQW
  • Footprint: Package_DFN_QFN:WDFN-12-1EP_3x3mm_P0.45mm_EP1.7x2.5mm
  • 3D model: WDFN-12(3x3) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Richtek Tech datasheet (16 pp, sha256 7d74cc5474f30a1b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF