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RS574XTSS20

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by Ray

Jiangsu RUNIC Tech Flip Flops, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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PCB Footprint

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Datasheet

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Contents

README

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RS574XTSS20

Jiangsu RUNIC Tech · Flip Flops · TSSOP-20

RS574XTSS20 from Jiangsu RUNIC Tech, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low 3-state output enable. When low, the eight Q outputs drive the stored flip-flop values; when high, all Q outputs enter the high-impedance state. Does not affect the internal flip-flop state.
2 D0 input Data input to flip-flop 0; captured to Q0 on the rising edge of CLK. CMOS-compatible logic input over the full 2 V to 5.5 V VCC range.
3 D1 input Data input to flip-flop 1; captured to Q1 on the rising edge of CLK.
4 D2 input Data input to flip-flop 2; captured to Q2 on the rising edge of CLK.
5 D3 input Data input to flip-flop 3; captured to Q3 on the rising edge of CLK.
6 D4 input Data input to flip-flop 4; captured to Q4 on the rising edge of CLK.
7 D5 input Data input to flip-flop 5; captured to Q5 on the rising edge of CLK.
8 D6 input Data input to flip-flop 6; captured to Q6 on the rising edge of CLK.
9 D7 input Data input to flip-flop 7; captured to Q7 on the rising edge of CLK.
10 GND power_in Device ground reference. Tie to system ground.
11 CLK input Clock input common to all eight flip-flops. Data on D0-D7 is latched on the low-to-high (rising) transition of CLK, subject to the tsu / th setup and hold requirements.
12 Q7 tri_state 3-state data output for flip-flop 7. Drives the latched D7 value when OE is low; high-impedance when OE is high. Rated ±16 mA output drive at VCC = 4.5 V.
13 Q6 tri_state 3-state data output for flip-flop 6. Drives the latched D6 value when OE is low; high-impedance when OE is high.
14 Q5 tri_state 3-state data output for flip-flop 5. Drives the latched D5 value when OE is low; high-impedance when OE is high.
15 Q4 tri_state 3-state data output for flip-flop 4. Drives the latched D4 value when OE is low; high-impedance when OE is high.
16 Q3 tri_state 3-state data output for flip-flop 3. Drives the latched D3 value when OE is low; high-impedance when OE is high.
17 Q2 tri_state 3-state data output for flip-flop 2. Drives the latched D2 value when OE is low; high-impedance when OE is high.
18 Q1 tri_state 3-state data output for flip-flop 1. Drives the latched D1 value when OE is low; high-impedance when OE is high.
19 Q0 tri_state 3-state data output for flip-flop 0. Drives the latched D0 value when OE is low; high-impedance when OE is high.
20 VCC power_in Positive supply voltage, 2 V to 5.5 V (absolute max 6.5 V). Bypass locally with a 0.1 µF ceramic capacitor to GND.

Key specifications

Parameter Value
Manufacturer Jiangsu RUNIC Tech
Package TSSOP-20
Category Logic
Pins 20

Ordering variants

Same part, different packaging or reel option.

  • RS574XTSS20
  • RS574XTSS20XS20

CAD (KiCad official)

  • Symbol: RS574XTSS20
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
rs574xtss20.step 267 KB You want the bare part, or you mark your own boards.
rs574xtss20-etched.step 3.1 MB You want the part with RS574XTSS20 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 756 faces against 327 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Jiangsu RUNIC Tech datasheet (18 pp, sha256 1b3d3a352669147f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF