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rs1g04xf5

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by Ray

Jiangsu RUNIC Tech Inverters, SOT23-5L. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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RS1G04XF5

Jiangsu RUNIC Tech · Inverters · SOT23-5L

RS1G04XF5 from Jiangsu RUNIC Tech, in a SOT23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 N.C. unconnected Not connected - no internal die bond. Datasheet recommends tying this pin to GND for use as a heat-spreading plane, but leaving it floating is electrically acceptable.
2 A input Logic input to the inverter gate. CMOS-compatible; VIH = 0.65×VCC to 0.7×VCC and VIL = 0.35×VCC to 0.3×VCC depending on supply. Input is 5.5 V-tolerant regardless of VCC (Ioff / partial-power-down support).
3 GND power_in Ground / negative supply return for the device.
4 Y output Inverted logic output (Y = A̅). Push-pull CMOS output rated for high drive: typ ±24 mA at VCC = 3.0 V and up to ±32 mA at VCC = 4.5 V. VOH ≥ VCC − 0.1 V and VOL ≤ 0.1 V at IO = 100 µA.
5 VCC power_in Positive supply input. Operating range 1.65 V to 5.5 V (1.5 V minimum for data retention only). Absolute max 6.5 V. Recommended decoupling with a 0.1 µF cap to GND close to the pin.

Key specifications

Parameter Value
Manufacturer Jiangsu RUNIC Tech
Package SOT23-5L
Category Logic
Pins 5

Ordering variants

  • RS1G04XF5
  • RS1G04XF5XC5

CAD (KiCad official)

  • Symbol: RS1G04XF5
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT23-5L (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Jiangsu RUNIC Tech datasheet (None pp, sha256 138ac5958158dcf3, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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