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RS164XP

Jiangsu RUNIC Tech · Shifting Register · SOIC-14

RS164XP from Jiangsu RUNIC Tech, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Serial data input A. Either A or B can be used as an active-High enable for data entry through the other input. Data is shifted on the Low-to-High transition of CLK.
2 B input Serial data input B. Either A or B can be used as an active-High enable for data entry through the other input. Data is shifted on the Low-to-High transition of CLK.
3 Q0 output Parallel data output bit 0. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
4 Q1 output Parallel data output bit 1. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
5 Q2 output Parallel data output bit 2. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
6 Q3 output Parallel data output bit 3. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
7 GND power_in Ground reference (0 V). Maximum ground current -50 mA.
8 CLK input Clock input. Data on A/B is shifted into the register on the Low-to-High (rising) edge. Max clock frequency 4 MHz at VCC = 1.65 V, 24 MHz at VCC = 5.5 V.
9 CLR input Master reset, active Low (CLR̅). A Low asynchronously clears the register and forces all Q0-Q7 outputs Low, independent of CLK and data inputs.
10 Q4 output Parallel data output bit 4. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
11 Q5 output Parallel data output bit 5. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
12 Q6 output Parallel data output bit 6. Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
13 Q7 output Parallel data output bit 7 (MSB of the shift register). Push-pull CMOS output; drives VOH ≥ VCC-0.1 V at IO = -100 µA and VOL ≤ 0.1 V at IO = 100 µA (1.65 V-5.5 V).
14 VCC power_in Supply voltage input. Recommended operating range 1.65 V to 5.5 V; absolute maximum 6.5 V. Supply current ICC ≤ 8 µA (max, static).

Key specifications

Parameter Value
Manufacturer Jiangsu RUNIC Tech
Package SOIC-14
Category Logic
Pins 14

Ordering variants

  • RS164XP
  • RS164XPRS164XQ

CAD (KiCad official)

  • Symbol: RS164XP
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Jiangsu RUNIC Tech datasheet (None pp, sha256 98f6ac3b85d1908e, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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