Raspberry Pi's own microcontroller, a dual-core Arm Cortex-M0+ running at up to 133 MHz in a QFN-56, the chip at the heart of the Pico. It pairs 264 KB of on-chip SRAM with an external QSPI flash interface (execute-in-place), and its standout feature is the Programmable I/O (PIO): eight small state machines that bit-bang custom protocols like DPI, DVI, or WS2812 at full speed without tying up the cores. It brings out 30 GPIO (four shared with a 12-bit ADC), USB 1.1 host/device, two each of UART/SPI/I2C, and PWM, all from a single chip that needs only a crystal, flash, and a 3.3 V supply. Datasheet-verified 56-pin pinout.

Pinout

Pin	Name	Type	Function
1	IOVDD	power_in	Power supply for digital GPIOs, nominal 1.8V to 3.3V.
2	GPIO0	bidirectional	General-purpose digital I/O; muxable to SPI0 RX, UART0 TX, I2C0 SDA, PWM0 A, SIO, PIO0, PIO1, USB OVCUR DET.
3	GPIO1	bidirectional	General-purpose digital I/O; muxable to SPI0 CSn, UART0 RX, I2C0 SCL, PWM0 B, SIO, PIO0, PIO1, USB VBUS DET.
4	GPIO2	bidirectional	General-purpose digital I/O; muxable to SPI0 SCK, UART0 CTS, I2C1 SDA, PWM1 A, SIO, PIO0, PIO1, USB VBUS EN.
5	GPIO3	bidirectional	General-purpose digital I/O; muxable to SPI0 TX, UART0 RTS, I2C1 SCL, PWM1 B, SIO, PIO0, PIO1, USB OVCUR DET.
6	GPIO4	bidirectional	General-purpose digital I/O; muxable to SPI0 RX, UART1 TX, I2C0 SDA, PWM2 A, SIO, PIO0, PIO1, USB VBUS DET.
7	GPIO5	bidirectional	General-purpose digital I/O; muxable to SPI0 CSn, UART1 RX, I2C0 SCL, PWM2 B, SIO, PIO0, PIO1, USB VBUS EN.
8	GPIO6	bidirectional	General-purpose digital I/O; muxable to SPI0 SCK, UART1 CTS, I2C1 SDA, PWM3 A, SIO, PIO0, PIO1, USB OVCUR DET.
9	GPIO7	bidirectional	General-purpose digital I/O; muxable to SPI0 TX, UART1 RTS, I2C1 SCL, PWM3 B, SIO, PIO0, PIO1, USB VBUS DET.
10	IOVDD	power_in	Power supply for digital GPIOs, nominal 1.8V to 3.3V.
11	GPIO8	bidirectional	General-purpose digital I/O; muxable to SPI1 RX, UART1 TX, I2C0 SDA, PWM4 A, SIO, PIO0, PIO1, USB VBUS EN.
12	GPIO9	bidirectional	General-purpose digital I/O; muxable to SPI1 CSn, UART1 RX, I2C0 SCL, PWM4 B, SIO, PIO0, PIO1, USB OVCUR DET.
13	GPIO10	bidirectional	General-purpose digital I/O; muxable to SPI1 SCK, UART1 CTS, I2C1 SDA, PWM5 A, SIO, PIO0, PIO1, USB VBUS DET.
14	GPIO11	bidirectional	General-purpose digital I/O; muxable to SPI1 TX, UART1 RTS, I2C1 SCL, PWM5 B, SIO, PIO0, PIO1, USB VBUS EN.
15	GPIO12	bidirectional	General-purpose digital I/O; muxable to SPI1 RX, UART0 TX, I2C0 SDA, PWM6 A, SIO, PIO0, PIO1, USB OVCUR DET.
16	GPIO13	bidirectional	General-purpose digital I/O; muxable to SPI1 CSn, UART0 RX, I2C0 SCL, PWM6 B, SIO, PIO0, PIO1, USB VBUS DET.
17	GPIO14	bidirectional	General-purpose digital I/O; muxable to SPI1 SCK, UART0 CTS, I2C1 SDA, PWM7 A, SIO, PIO0, PIO1, USB VBUS EN.
18	GPIO15	bidirectional	General-purpose digital I/O; muxable to SPI1 TX, UART0 RTS, I2C1 SCL, PWM7 B, SIO, PIO0, PIO1, USB OVCUR DET.
19	TESTEN	input	Factory test mode pin. Tie to GND in normal operation.
20	XIN	input	Crystal oscillator input. Also usable as a single-ended CMOS clock input (12MHz required for USB bootloader) with XOUT disconnected.
21	XOUT	output	Crystal oscillator output. Leave disconnected when driving XIN from a single-ended CMOS clock source.
22	IOVDD	power_in	Power supply for digital GPIOs, nominal 1.8V to 3.3V.
23	DVDD	power_in	Digital core power supply, nominal 1.1V. Typically tied to VREG_VOUT or another board-level 1.1V rail.
24	SWCLK	input	Serial Wire Debug clock for the internal SWD multi-drop bus; provides debug access to both processors and can be used to download code.
25	SWDIO	bidirectional	Serial Wire Debug bidirectional data line for the internal SWD multi-drop bus.
26	RUN	input	Global asynchronous reset pin (active low). Tie directly to IOVDD if no external reset is needed.
27	GPIO16	bidirectional	General-purpose digital I/O; muxable to SPI0 RX, UART0 TX, I2C0 SDA, PWM0 A, SIO, PIO0, PIO1, USB VBUS DET.
28	GPIO17	bidirectional	General-purpose digital I/O; muxable to SPI0 CSn, UART0 RX, I2C0 SCL, PWM0 B, SIO, PIO0, PIO1, USB VBUS EN.
29	GPIO18	bidirectional	General-purpose digital I/O; muxable to SPI0 SCK, UART0 CTS, I2C1 SDA, PWM1 A, SIO, PIO0, PIO1, USB OVCUR DET.
30	GPIO19	bidirectional	General-purpose digital I/O; muxable to SPI0 TX, UART0 RTS, I2C1 SCL, PWM1 B, SIO, PIO0, PIO1, USB VBUS DET.
31	GPIO20	bidirectional	General-purpose digital I/O; muxable to SPI0 RX, UART1 TX, I2C0 SDA, PWM2 A, SIO, PIO0, PIO1, CLOCK GPIN0, USB VBUS EN.
32	GPIO21	bidirectional	General-purpose digital I/O; muxable to SPI0 CSn, UART1 RX, I2C0 SCL, PWM2 B, SIO, PIO0, PIO1, CLOCK GPOUT0, USB OVCUR DET.
33	IOVDD	power_in	Power supply for digital GPIOs, nominal 1.8V to 3.3V.
34	GPIO22	bidirectional	General-purpose digital I/O; muxable to SPI0 SCK, UART1 CTS, I2C1 SDA, PWM3 A, SIO, PIO0, PIO1, CLOCK GPIN1, USB VBUS DET.
35	GPIO23	bidirectional	General-purpose digital I/O; muxable to SPI0 TX, UART1 RTS, I2C1 SCL, PWM3 B, SIO, PIO0, PIO1, CLOCK GPOUT1, USB VBUS EN.
36	GPIO24	bidirectional	General-purpose digital I/O; muxable to SPI1 RX, UART1 TX, I2C0 SDA, PWM4 A, SIO, PIO0, PIO1, CLOCK GPOUT2, USB OVCUR DET.
37	GPIO25	bidirectional	General-purpose digital I/O; muxable to SPI1 CSn, UART1 RX, I2C0 SCL, PWM4 B, SIO, PIO0, PIO1, CLOCK GPOUT3, USB VBUS DET.
38	GPIO26/ADC0	bidirectional	General-purpose digital I/O with 12-bit ADC input on channel 0; muxable to SPI1 SCK, UART1 CTS, I2C1 SDA, PWM5 A, SIO, PIO0, PIO1, USB VBUS EN.
39	GPIO27/ADC1	bidirectional	General-purpose digital I/O with 12-bit ADC input on channel 1; muxable to SPI1 TX, UART1 RTS, I2C1 SCL, PWM5 B, SIO, PIO0, PIO1, USB OVCUR DET.
40	GPIO28/ADC2	bidirectional	General-purpose digital I/O with 12-bit ADC input on channel 2; muxable to SPI1 RX, UART0 TX, I2C0 SDA, PWM6 A, SIO, PIO0, PIO1, USB VBUS DET.
41	GPIO29/ADC3	bidirectional	General-purpose digital I/O with 12-bit ADC input on channel 3; muxable to SPI1 CSn, UART0 RX, I2C0 SCL, PWM6 B, SIO, PIO0, PIO1, USB VBUS EN.
42	IOVDD	power_in	Power supply for digital GPIOs, nominal 1.8V to 3.3V.
43	ADC_AVDD	power_in	Analog power supply for the ADC, nominal 3.3V.
44	VREG_VIN	power_in	Power input to the internal core voltage regulator, nominal 1.8V to 3.3V.
45	VREG_VOUT	power_out	Regulated core voltage output from the internal regulator, nominal 1.1V, 100mA max. Typically tied to DVDD.
46	USB_DM	bidirectional	USB 1.1 D- line. Requires a 27Ω series termination resistor; internal pull-up/pull-down provided.
47	USB_DP	bidirectional	USB 1.1 D+ line. Requires a 27Ω series termination resistor; internal pull-up/pull-down provided.
48	USB_VDD	power_in	Power supply for the internal USB Full Speed PHY, nominal 3.3V.
49	IOVDD	power_in	Power supply for digital GPIOs, nominal 1.8V to 3.3V.
50	DVDD	power_in	Digital core power supply, nominal 1.1V. Typically tied to VREG_VOUT or another board-level 1.1V rail.
51	QSPI_SD3	bidirectional	QSPI flash data line 3 for the XIP interface; also usable as a software-controlled GPIO if not used for flash.
52	QSPI_SCLK	output	QSPI flash clock output for the XIP interface; also usable as a software-controlled GPIO if not used for flash.
53	QSPI_SD0	bidirectional	QSPI flash data line 0 (MOSI in single/dual mode) for the XIP interface; also usable as a software-controlled GPIO if not used for flash.
54	QSPI_SD2	bidirectional	QSPI flash data line 2 for the XIP interface; also usable as a software-controlled GPIO if not used for flash.
55	QSPI_SD1	bidirectional	QSPI flash data line 1 (MISO in single/dual mode) for the XIP interface; also usable as a software-controlled GPIO if not used for flash.
56	QSPI_SS_N	output	QSPI flash chip-select (active low) for the XIP interface; also usable as a software-controlled GPIO if not used for flash.
57	GND	power_in	Center exposed thermal pad - single external ground connection bonded to all internal ground pads on the RP2040 die.

Key specifications

Parameter	Value
Cores	2x Arm Cortex-M0+
Max clock	133 MHz
SRAM	264 KB (on-chip)
Flash	external QSPI (XIP)
GPIO	30 (4 with 12-bit ADC)
Special	8x Programmable I/O (PIO) state machines
USB	1.1 host + device
Supply voltage	1.8-3.3 V (IO), 1.1 V core
Package	QFN-56 (7x7 mm)

Ordering variants

Same part, different packaging or reel option.

RP2040 (QFN-56)
RP2040TR (QFN-56, tape & reel)

CAD (KiCad official)

Symbol: MCU_RaspberryPi:RP2040
Footprint: Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP3.2x3.2mm
3D model: QFN-56 (KiCad packages3D)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Raspberry Pi datasheet (19 pp, sha256 f72af3be94fae58e, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF