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PY32F002AL15S6TU

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by Ray

PUYA Microcontrollers (MCU/MPU/SOC), SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentembedded processors & controllerspy32f002al15s6tu
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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PY32F002AL15S6TU

PUYA · Microcontrollers (MCU/MPU/SOC) · SOP-8

PY32F002AL15S6TU from PUYA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Digital power supply. Operating range 1.7 V to 5.5 V.
2 PA4/PA10 bidirectional Bonded GPIO pin providing both PA4 and PA10 on the SOP8 package. PA4 supports SPI1_NSS, USART1_CK, ADC_IN4; PA10 supports USART1_RX/TX, TIM1_CH3, I2C_SDA/SCL, SPI1_NSS.
3 PA3 bidirectional General-purpose I/O with 5 V-tolerant COM structure. Alternate functions: USART1_RX, EVENTOUT, SPI1_MOSI, TIM1_CH1, I2C_SCL; additional feature COMP2_INP / ADC_IN3.
4 PA14-SWC/PB3 bidirectional Bonded pin providing PA14 (SWCLK after reset with internal pull-down) and PB3 on the SOP8 package. PA14 alternates: SWCLK, USART1_TX, EVENTOUT, MCO. PB3 alternates: SPI1_SCK, TIM1_CH2, USART1_RTS, EVENTOUT.
5 PA13-SWD bidirectional Serial-wire debug data I/O (SWDIO) after reset, with internal pull-up enabled (note 2). Alternates: EVENTOUT, SPI1_MISO, TIM1_CH2, USART1_RX, MCO.
6 PA2/PF2-NRST bidirectional Bonded pin providing PA2 GPIO and PF2/NRST reset input. NRST is an active-low reset with internal weak pull-up (RST port structure). Whether the pin acts as PF2 GPIO or NRST is selected via option bytes (note 1). PA2 alternates: SPI1_MOSI, USART1_TX, SPI1_SCK, COMP2_OUT, I2C_SDA; additional COMP2_INM / ADC_IN2.
7 PA1 bidirectional General-purpose I/O with 5 V-tolerant COM structure. Alternates: SPI1_SCK, USART1_RTS, EVENTOUT, SPI1_MOSI, TIM1_CH4, TIM1_CH2N, MCO; additional COMP1_INP / ADC_IN1.
8 VSS power_in Ground reference for both digital and analog supply domains.

Key specifications

Parameter Value
Manufacturer PUYA
Package SOP-8
Category Embedded Processors & Controllers
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • PY32F002AL15S6TU
  • PY32F002AL15S6TUAW15S
  • PY32F002AL15S6TUAA15M
  • PY32F002AL15S6TUAA15N
  • PY32F002AL15S6TUAF15P
  • PY32F002AL15S6TUAW15U
  • PY32F002AL15S6TUAF15U

CAD (KiCad official)

  • Symbol: PY32F002AL15S6TU
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PUYA datasheet (47 pp, sha256 88e8aa095da1d0fb, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF