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Contents

README

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PJ78M09TE

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · TO-252

PJ78M09TE from PJSEMI, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Unregulated positive supply input. Accepts up to 35V absolute maximum; a 0.33μF ceramic bypass capacitor to GND is recommended close to the pin for stability.
2 GND power_in Ground/common reference for both input and output. Also connected to the exposed tab of the TO-252 package for thermal dissipation.
3 OUT power_out Regulated +9V output, capable of up to 0.5A (typ. 350mA test condition). Requires a 0.1μF ceramic bypass capacitor to GND for transient response; typical short-circuit current is 50mA.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package TO-252
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PJ78M09TE

CAD (KiCad official)

  • Symbol: PJ78M09TE
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (4 pp, sha256 ddc34df32e6db9d8, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF