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Contents

README

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PJ75AL33SA

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

PJ75AL33SA from PJSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Unregulated supply input. Absolute maximum 36V (recommended operating up to 30V for line regulation spec). Bypass to GND with a 10μF capacitor (C1) close to the pin.
2 GND power_in Common ground / return for both input and output. Should be tied to the single-point ground of the application circuit.
3 VOUT power_out Regulated 3.3V output (±2% tolerance, 3.234-3.366V). Requires a 10μF output capacitor (C2) to GND for stability. Rated typ. 100mA output current (min. 70mA) with VIN = VOUT + 2.0V.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PJ75AL33SA

CAD (KiCad official)

  • Symbol: PJ75AL33SA
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (5 pp, sha256 ddcff12eed21c827, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF