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PJ75AL30SQ

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by Ray

PJSEMI Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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PJ75AL30SQ

PJSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

PJ75AL30SQ from PJSEMI, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground return for the regulator. Connect to the single-point system ground with a wide, short trace shared with the input and output capacitor returns.
2 VIN power_in Unregulated input supply, -0.3 V to +36 V absolute maximum. Decouple with a 10 µF ceramic capacitor placed as close as possible to the pin.
3 VOUT power_out Regulated 3.0 V output (±2%) capable of sourcing up to 100 mA typical. Requires a minimum 10 µF X7R/X5R ceramic output capacitor for loop stability.

Key specifications

Parameter Value
Manufacturer PJSEMI
Package SOT-89-3
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PJ75AL30SQ
  • PJ75AL30SQSA
  • PJ75AL30SQSC
  • PJ75AL30SQSE

CAD (KiCad official)

  • Symbol: PJ75AL30SQ
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: PJSEMI datasheet (9 pp, sha256 ec9ac50694a28a8f, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF