PIC18F46K22-I from Microchip, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	MCLR/VPP/RE3	input	Active-low Master Clear (device Reset) input; also programming voltage (VPP) during ICSP; can be used as digital input RE3.
2	RA0/C12IN0-/AN0	bidirectional	Port A0 digital I/O; also comparator C1/C2 inverting input (C12IN0-) and 10-bit ADC channel AN0.
3	RA1/C12IN1-/AN1	bidirectional	Port A1 digital I/O; comparator C1/C2 inverting input (C12IN1-) and ADC channel AN1.
4	RA2/C2IN+/AN2/DACOUT/VREF-	bidirectional	Port A2 digital I/O; comparator C2 non-inverting input; ADC channel AN2; 5-bit DAC output (DACOUT); ADC low reference input (VREF-).
5	RA3/C1IN+/AN3/VREF+	bidirectional	Port A3 digital I/O; comparator C1 non-inverting input; ADC channel AN3; ADC high reference input (VREF+).
6	RA4/C1OUT/SRQ/T0CKI	bidirectional	Port A4 digital I/O (ST); comparator C1 output; SR latch Q output; Timer0 external clock input.
7	RA5/C2OUT/SRNQ/SS1/HLVDIN/AN4	bidirectional	Port A5 digital I/O; comparator C2 output; SR latch inverted Q output; MSSP1 SPI slave select (SS1, active-low); High/Low Voltage Detect input; ADC channel AN4.
8	RE0/P3A/CCP3/AN5	bidirectional	Port E0 digital I/O; alternate ECCP3 PWM A output (P3A); alternate CCP3 capture/compare/PWM; ADC channel AN5.
9	RE1/P3B/AN6	bidirectional	Port E1 digital I/O; ECCP3 PWM B output (P3B); ADC channel AN6.
10	RE2/CCP5/AN7	bidirectional	Port E2 digital I/O; CCP5 capture/compare/PWM; ADC channel AN7.
11	VDD	power_in	Positive supply for logic and I/O pins. Operating range 2.3-5.5V (PIC18FxxK22) or 1.8-3.6V (PIC18LFxxK22). Bypass with 0.1 uF ceramic to VSS.
12	VSS	power_in	Ground reference for logic and I/O pins.
13	RA7/CLKI/OSC1	bidirectional	Port A7 digital I/O; external clock source input (CLKI); crystal oscillator input (OSC1). Connect crystal between OSC1 and OSC2 in crystal modes.
14	RA6/CLKO/OSC2	bidirectional	Port A6 digital I/O; oscillator crystal output (OSC2); in RC mode outputs CLKOUT at Fosc/4.
15	RC0/P2B/T3CKI/T3G/T1CKI/SOSCO	bidirectional	Port C0 digital I/O; alternate ECCP2 PWM B (P2B); Timer3 clock input (default T3CKI); Timer3 external gate input; Timer1 clock input; secondary oscillator output (SOSCO, 32.768 kHz).
16	RC1/P2A/CCP2/SOSCI	bidirectional	Port C1 digital I/O; ECCP2 PWM A output (P2A, default); CCP2 capture/compare/PWM (default); secondary oscillator input (SOSCI).
17	RC2/CTPLS/P1A/CCP1/T5CKI/AN14	bidirectional	Port C2 digital I/O; CTMU pulse generator output; ECCP1 PWM A output (P1A); CCP1 capture/compare/PWM; Timer5 clock input; ADC channel AN14.
18	RC3/SCK1/SCL1/AN15	bidirectional	Port C3 digital I/O; MSSP1 SPI clock (SCK1); MSSP1 I2C clock (SCL1); ADC channel AN15.
19	RD0/SCK2/SCL2/AN20	bidirectional	Port D0 digital I/O; MSSP2 SPI clock (SCK2); MSSP2 I2C clock (SCL2); ADC channel AN20.
20	RD1/CCP4/SDI2/SDA2/AN21	bidirectional	Port D1 digital I/O; CCP4 capture/compare/PWM; MSSP2 SPI data in (SDI2); MSSP2 I2C data (SDA2); ADC channel AN21.
21	RD2/P2B/AN22	bidirectional	Port D2 digital I/O; ECCP2 PWM B output (P2B, default); ADC channel AN22.
22	RD3/P2C/SS2/AN23	bidirectional	Port D3 digital I/O; ECCP2 PWM C output (P2C); MSSP2 SPI slave select (SS2, active-low); ADC channel AN23.
23	RC4/SDI1/SDA1/AN16	bidirectional	Port C4 digital I/O; MSSP1 SPI data in (SDI1); MSSP1 I2C data (SDA1); ADC channel AN16.
24	RC5/SDO1/AN17	bidirectional	Port C5 digital I/O; MSSP1 SPI data out (SDO1); ADC channel AN17.
25	RC6/TX1/CK1/AN18	bidirectional	Port C6 digital I/O; EUSART1 asynchronous transmit (TX1); EUSART1 synchronous clock (CK1); ADC channel AN18.
26	RC7/RX1/DT1/AN19	bidirectional	Port C7 digital I/O; EUSART1 asynchronous receive (RX1); EUSART1 synchronous data (DT1); ADC channel AN19.
27	RD4/P2D/SDO2/AN24	bidirectional	Port D4 digital I/O; ECCP2 PWM D output (P2D); MSSP2 SPI data out (SDO2); ADC channel AN24.
28	RD5/P1B/AN25	bidirectional	Port D5 digital I/O; ECCP1 PWM B output (P1B); ADC channel AN25.
29	RD6/P1C/TX2/CK2/AN26	bidirectional	Port D6 digital I/O; ECCP1 PWM C output (P1C); EUSART2 asynchronous transmit (TX2); EUSART2 synchronous clock (CK2); ADC channel AN26.
30	RD7/P1D/RX2/DT2/AN27	bidirectional	Port D7 digital I/O; ECCP1 PWM D output (P1D); EUSART2 asynchronous receive (RX2); EUSART2 synchronous data (DT2); ADC channel AN27.
31	VSS	power_in	Ground reference for logic and I/O pins.
32	VDD	power_in	Positive supply for logic and I/O pins. Operating range 2.3-5.5V (F) or 1.8-3.6V (LF). Bypass with 0.1 uF ceramic to VSS.
33	RB0/INT0/FLT0/SRI/AN12	bidirectional	Port B0 digital I/O with weak pull-up; external interrupt 0 (INT0); ECCP PWM Auto-Shutdown fault input (FLT0); SR latch input; ADC channel AN12.
34	RB1/INT1/C12IN3-/AN10	bidirectional	Port B1 digital I/O; external interrupt 1 (INT1); comparator C1/C2 inverting input (C12IN3-); ADC channel AN10.
35	RB2/INT2/CTED1/AN8	bidirectional	Port B2 digital I/O; external interrupt 2 (INT2); CTMU edge 1 input; ADC channel AN8.
36	RB3/CTED2/P2A/CCP2/C12IN2-/AN9	bidirectional	Port B3 digital I/O; CTMU edge 2 input; alternate ECCP2 PWM A (P2A) and CCP2 (CCP2MX clear); comparator inverting input (C12IN2-); ADC channel AN9.
37	RB4/IOC0/T5G/AN11	bidirectional	Port B4 digital I/O; interrupt-on-change (IOC0); Timer5 external gate input; ADC channel AN11.
38	RB5/IOC1/P3A/CCP3/T3CKI/T1G/AN13	bidirectional	Port B5 digital I/O; interrupt-on-change (IOC1); default ECCP3 PWM A (P3A) and CCP3 (CCP3MX set); alternate Timer3 clock input; Timer1 external gate; ADC channel AN13.
39	RB6/IOC2/PGC	bidirectional	Port B6 digital I/O; interrupt-on-change (IOC2); In-Circuit Debugger/ICSP programming clock (PGC).
40	RB7/IOC3/PGD	bidirectional	Port B7 digital I/O; interrupt-on-change (IOC3); In-Circuit Debugger/ICSP programming data (PGD).

Key specifications

Parameter	Value
Manufacturer	Microchip
Package	TQFP-44(10x10)
Category	MCU
Pins	40

Ordering variants

Same part, different packaging or reel option.

PIC18F46K22-II/P
PIC18F46K22-II/PT
PIC18F46K22-II/ML
PIC18F46K22-II/MV

CAD (KiCad official)

Symbol: PIC18F46K22-I
Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
3D model: TQFP-44(10x10) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`pic18f46k22-i.step`	596 KB	You want the bare part, or you mark your own boards.
`pic18f46k22-i-etched.step`	4.2 MB	You want the part with `PIC18F46K22-I` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1067 faces against 695 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip datasheet (539 pp, sha256 dbf68925f53cc096, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF