PIC18F45K80-I from Microchip, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	MCLR/RE3	input	Active-low master clear (device reset) input; also usable as digital input RE3 when MCLR function is disabled by configuration.
2	RA0/CVREF/AN0/ULPWU	bidirectional	Port A bit 0 / comparator voltage reference output / ADC analog channel 0 / ultra-low-power wake-up input.
3	RA1/AN1/C1INC	bidirectional	Port A bit 1 / ADC analog channel 1 / comparator 1 input C.
4	RA2/VREF-/AN2/C2INC	bidirectional	Port A bit 2 / ADC negative voltage reference input / ADC analog channel 2 / comparator 2 input C.
5	RA3/VREF+/AN3	bidirectional	Port A bit 3 / ADC positive voltage reference input / ADC analog channel 3.
6	VDDCORE/VCAP	power_in	Regulated core logic supply (VDDCORE) on LF parts, or external filter capacitor connection (VCAP, typ. 10 uF low-ESR to VSS) on F parts with internal LDO regulator enabled.
7	RA5/AN4/HLVDIN/T1CKI/SS	bidirectional	Port A bit 5 / ADC analog channel 4 / high/low-voltage detect input / Timer1 clock input / MSSP SPI slave select (active low).
8	RE0/AN5/RD	bidirectional	Port E bit 0 / ADC analog channel 5 / parallel slave port read strobe input (active low).
9	RE1/AN6/C1OUT/WR	bidirectional	Port E bit 1 / ADC analog channel 6 / comparator 1 output / parallel slave port write strobe input (active low).
10	RE2/AN7/C2OUT/CS	bidirectional	Port E bit 2 / ADC analog channel 7 / comparator 2 output / parallel slave port chip select input (active low).
11	VDD	power_in	Positive supply for I/O and logic. Operating range 1.8 V to 5.5 V (LF) / 2.7 V to 5.5 V (F).
12	VSS	power_in	Ground reference for logic and I/O.
13	OSC1/CLKIN/RA7	bidirectional	Primary oscillator input, external clock input, or general-purpose I/O port A bit 7.
14	OSC2/CLKOUT/RA6	bidirectional	Primary oscillator output (crystal), Fosc/4 clock output, or general-purpose I/O port A bit 6.
15	RC0/SOSCO/SCLKI	bidirectional	Port C bit 0 / secondary (Timer1/Timer3/Timer5) oscillator output / secondary oscillator clock input.
16	RC1/SOSCI	bidirectional	Port C bit 1 / secondary oscillator crystal input.
17	RC2/T1G/CCP2	bidirectional	Port C bit 2 / Timer1 external gate input / Capture-2, Compare-2, PWM-2 I/O.
18	RC3/REFO/SCL/SCK	bidirectional	Port C bit 3 / reference clock output / MSSP I2C clock / MSSP SPI clock.
19	RD0/C1INA/PSP0	bidirectional	Port D bit 0 / comparator 1 input A / parallel slave port data 0.
20	RD1/C1INB/PSP1	bidirectional	Port D bit 1 / comparator 1 input B / parallel slave port data 1.
21	RD2/C2INA/PSP2	bidirectional	Port D bit 2 / comparator 2 input A / parallel slave port data 2.
22	RD3/C2INB/CTMUI/PSP3	bidirectional	Port D bit 3 / comparator 2 input B / CTMU pulse-generator output / parallel slave port data 3.
23	RC4/SDA/SDI	bidirectional	Port C bit 4 / MSSP I2C data / MSSP SPI serial data in.
24	RC5/SDO	bidirectional	Port C bit 5 / MSSP SPI serial data out.
25	RC6/CANTX/TX1/CK1/CCP3	bidirectional	Port C bit 6 / ECAN transmit / EUSART1 async transmit / EUSART1 sync clock / CCP3 Capture/Compare/PWM I/O.
26	RC7/CANRX/RX1/DT1/CCP4	bidirectional	Port C bit 7 / ECAN receive / EUSART1 async receive / EUSART1 sync data / CCP4 Capture/Compare/PWM I/O.
27	RD4/ECCP1/P1A/PSP4	bidirectional	Port D bit 4 / ECCP1 Enhanced Capture/Compare/PWM I/O / PWM1 output A / parallel slave port data 4.
28	RD5/P1B/PSP5	bidirectional	Port D bit 5 / ECCP1 PWM output B / parallel slave port data 5.
29	RD6/TX2/CK2/P1C/PSP6	bidirectional	Port D bit 6 / EUSART2 async transmit / EUSART2 sync clock / ECCP1 PWM output C / parallel slave port data 6.
30	RD7/RX2/DT2/P1D/PSP7	bidirectional	Port D bit 7 / EUSART2 async receive / EUSART2 sync data / ECCP1 PWM output D / parallel slave port data 7.
31	VSS	power_in	Ground reference for logic and I/O.
32	VDD	power_in	Positive supply for I/O and logic. Operating range 1.8 V to 5.5 V (LF) / 2.7 V to 5.5 V (F).
33	RB0/AN10/FLT0/INT0	bidirectional	Port B bit 0 / ADC analog channel 10 / ECCP1 fault input / external interrupt 0.
34	RB1/AN8/CTDIN/INT1	bidirectional	Port B bit 1 / ADC analog channel 8 / CTMU pulse delay input / external interrupt 1.
35	RB2/CANTX/CTED1/INT2	bidirectional	Port B bit 2 / ECAN transmit (alternate) / CTMU edge 1 input / external interrupt 2.
36	RB3/CANRX/CTED2/INT3	bidirectional	Port B bit 3 / ECAN receive (alternate) / CTMU edge 2 input / external interrupt 3.
37	RB4/AN9/CTPLS/KBI0	bidirectional	Port B bit 4 / ADC analog channel 9 / CTMU pulse output / interrupt-on-change bit 0.
38	RB5/T0CKI/T3CKI/CCP5/KBI1	bidirectional	Port B bit 5 / Timer0 external clock input / Timer3 external clock input / CCP5 Capture/Compare/PWM I/O / interrupt-on-change bit 1.
39	RB6/PGC/KBI2	bidirectional	Port B bit 6 / ICSP programming clock / in-circuit debug clock / interrupt-on-change bit 2.
40	RB7/PGD/T3G/KBI3	bidirectional	Port B bit 7 / ICSP programming data / in-circuit debug data / Timer3 external gate input / interrupt-on-change bit 3.

Key specifications

Parameter	Value
Manufacturer	Microchip
Package	TQFP-44(10x10)
Category	MCU
Pins	40

Ordering variants

Same part, different packaging or reel option.

PIC18F45K80-II/P
PIC18F45K80-II/PT
PIC18F45K80-II/ML

CAD (KiCad official)

Symbol: PIC18F45K80-I
Footprint: Package_QFP:TQFP-44_10x10mm_P0.8mm
3D model: TQFP-44(10x10) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`pic18f45k80-i.step`	596 KB	You want the bare part, or you mark your own boards.
`pic18f45k80-i-etched.step`	4.4 MB	You want the part with `PIC18F45K80-I` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 1094 faces against 695 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip datasheet (628 pp, sha256 762822c73d67ca56, retrieved 2026-08-17, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF