component
PI7C9X760CZDEX
Public Unreviewedby Ray
Diodes Incorporated UART, QFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPI7C9X760CZDEX
Diodes Incorporated · UART · QFN-24-EP(4x4)
PI7C9X760CZDEX from Diodes Incorporated, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RESET | input | Active-LOW reset input. A LOW pulse longer than 40 ns resets internal registers, forces all outputs to their reset state, and enables mode strapping. UART TX is idle and RX is ignored while asserted. |
| 2 | XTAL1 | input | Crystal input or external clock input. Connect a crystal between XTAL1 and XTAL2 (up to 24 MHz), or drive with an external clock up to 64 MHz. |
| 3 | XTAL2 | output | Crystal oscillator output. Used together with XTAL1 to form the internal oscillator circuit; leave floating when driving XTAL1 from an external clock. |
| 4 | VDD | power_in | Positive supply. Wide operating range 1.8 V / 2.5 V / 3.3 V. Decouple locally to VSS. |
| 5 | I2C/SPI | input | Host interface select strap. HIGH selects the I2C-bus slave interface; LOW selects SPI mode 0 slave. Sampled at reset. |
| 6 | CS/A0 | input | In SPI mode: Schmitt-trigger active-LOW SPI chip-select (CS). In I2C mode: device address select bit A0 (combined with A1 selects the base slave address per Table 9). |
| 7 | SI/A1 | input | In SPI mode: SPI serial data input (MOSI). In I2C mode: device address select bit A1 (combined with A0 selects the base slave address per Table 9). |
| 8 | SO | tri_state | SPI serial data output (MISO), tri-stateable. In I2C-bus configuration this pin's function is undefined and must be left as no-connect (N.C.). |
| 9 | SCL/SCLK | input | I2C-bus clock (SCL) input, or SPI serial clock (SCLK) input. Function selected by the I2C/SPI strap on pin 5. |
| 10 | SDA | bidirectional | I2C-bus data line, open-drain (bidirectional) when I2C is selected. In SPI configuration this pin is undefined and must be tied to VSS. |
| 11 | IRQ | output | Interrupt output, open-drain, active-LOW. Requires an external pull-up (~1 kΩ at 3.3 V, 1.5 kΩ at 2.5 V) to VDD. Fires on GPIO input change, RX errors, RX data available, TX buffer space, or modem status changes when enabled in the IER. |
| 12 | GPIO0 | bidirectional | Programmable general-purpose I/O pin. Direction and level controlled by the GPIO register. |
| 13 | GPIO1 | bidirectional | Programmable general-purpose I/O pin. |
| 14 | GPIO2 | bidirectional | Programmable general-purpose I/O pin. |
| 15 | GPIO3 | bidirectional | Programmable general-purpose I/O pin. |
| 16 | VSS | power_in | Ground return. |
| 17 | GPIO4/DSR | bidirectional | Programmable I/O pin, or modem DSR (Data Set Ready) input when configured for modem control. |
| 18 | GPIO5/DTR | bidirectional | Programmable I/O pin, or modem DTR (Data Terminal Ready) output when configured for modem control. |
| 19 | GPIO6/CD | bidirectional | Programmable I/O pin, or modem CD (Carrier Detect) input when configured for modem control. |
| 20 | GPIO7/RI | bidirectional | Programmable I/O pin, or modem RI (Ring Indicator) input when configured for modem control. |
| 21 | RTS | output | UART request-to-send output, active-LOW. Reflects MCR[1] or, if auto-RTS is enabled in EFR[6], is automatically driven based on RX-FIFO fill. Also used as RS-485 driver direction control. |
| 22 | CTS | input | UART clear-to-send input, active-LOW. Readable via MSR[4]; also gates transmission when auto-CTS is enabled via EFR[7]. |
| 23 | TX | output | UART transmitter output. In local loopback mode the pin is disabled and TX data is internally routed to RX. |
| 24 | RX | input | UART receiver input. In local loopback mode the pin is disabled and the internal TX is looped back to RX. |
| EP | VSS | power_in | Exposed thermal/center pad on the underside of the QFN-24. Metallic; must be soldered to the PCB ground plane. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | QFN-24-EP(4x4) |
| Category | Interface |
| Pins | 25 |
Ordering variants
Same part, different packaging or reel option.
PI7C9X760CZDEXPI7C9X760CZDEXL
CAD (KiCad official)
- Symbol:
PI7C9X760CZDEX - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm - 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (52 pp, sha256
f897ef4d5061537b, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).