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Contents

README

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PDTC143XT

Nexperia · Digital Transistors · SOT-23

PDTC143XT from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input (base) pin. Drives the internal NPN base through the 4.7 kΩ series resistor R1; a 10 kΩ resistor R2 sits between base and emitter/GND. Absolute maximum input voltage V_I = -7 V to +20 V.
2 GND passive Ground (emitter) pin. Common return connected internally to the NPN emitter and the bottom of R2.
3 O output Output (collector) pin. Open-collector switching output; V_CEO max 50 V, I_O max 100 mA, peak I_CM 100 mA for tp ≤ 1 ms.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PDTC143XT

CAD (KiCad official)

  • Symbol: PDTC143XT
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 733448517df971b0, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF