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PDTC143ET

Nexperia · Digital Transistors · SOT-23

PDTC143ET from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I input Input pin - connects to the base of the internal NPN transistor through the 4.7 kΩ series bias resistor R1. Drive high (>~2.5 V) to turn the transistor on.
2 GND passive Ground pin - connected to the emitter of the internal NPN transistor and to the low side of the internal base-emitter resistor R2 (4.7 kΩ).
3 O output Output pin - connected to the collector of the internal NPN transistor. Open-collector output rated 50 V VCEO, up to 100 mA sink current.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-23
Category Transistors/Thyristors
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • PDTC143ET

CAD (KiCad official)

  • Symbol: PDTC143ET
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 9cd7a017191a97c6, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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