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Contents

README

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PBLS4002Y

Nexperia · Digital Transistors · SOT-363

PBLS4002Y from Nexperia, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND1 passive Emitter of TR1 (PNP low V(CEsat) transistor). Typically tied to the load-switch ground/return reference.
2 B1 input Base of TR1 (PNP). Control input for the PNP switch; V(BEon) ≈ -1.1 V, I(B) rated to -50 mA (peak -100 mA).
3 O2 output Collector of TR2 (NPN RET). Output node of the resistor-equipped driver stage; V(CEO) = 50 V max, I(O) up to 100 mA. Commonly drives the base of TR1 through B1.
4 GND2 passive Emitter of TR2 (NPN RET). Return path for the driver transistor's emitter current.
5 I2 input Input of TR2 (NPN RET) - connects to the external side of the integrated base resistor R1 (3.3-6.1 kΩ, typ. 4.7 kΩ). Logic-level drive input; V(i(on)) ≥ 2.5 V min turns TR2 on, V(i(off)) ≤ 0.5 V keeps it off. Accepts -10 V to +30 V.
6 C1 passive Collector of TR1 (PNP low V(CEsat)). Main switched output of the PNP load switch; V(CEO) = -40 V, I(C_lim) = -500 mA, R(CEsat) ≈ 440 mΩ typ.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SOT-363
Category Transistors/Thyristors
Pins 6

Ordering variants

Same part, different packaging or reel option.

  • PBLS4002Y

CAD (KiCad official)

  • Symbol: PBLS4002Y
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (12 pp, sha256 40bb318b393009fc, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF