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Contents

README

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P75N02LDG-VB

VBsemi Elec · MOSFETs · TO-252

P75N02LDG-VB from VBsemi Elec, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate. Insulated MOS control terminal. VGS(th) = 1.5 V min / 2.5 V max @ ID = 250 µA; VGS absolute maximum ±20 V. Drive at VGS = 10 V for RDS(on) ≈ 0.002 Ω or VGS = 4.5 V for RDS(on) ≈ 0.003 Ω.
2 D passive Drain. Channel terminal / power switch node. VDS max = 30 V; continuous ID = 100 A (TC = 25 °C), IDM (pulsed) = 300 A. In TO-252, pin 2 is electrically the same as the tab (pin 4).
3 S passive Source. Return terminal of the N-channel MOSFET and anode of the intrinsic body diode (VSD typ. 0.8 V @ IS = 22 A). Reference for VGS and VDS.
4 D passive Drain tab (exposed metal pad, TO-252AA). Electrically identical to pin 2; provides the main thermal path to the PCB (RthJC = 0.5 °C/W typ.). Solder to a copper pour for rated current handling.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package TO-252
Category Transistors/Thyristors
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • P75N02LDG-VB

CAD (KiCad official)

  • Symbol: P75N02LDG-VB
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (None pp, sha256 5e8144c7353ebee4, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF