component
p24c08c-ssh-mir
Public Unreviewedby Ray
PUYA EEPROM, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
README
markdownP24C08C-SSH-MIR
PUYA · EEPROM · SOP-8
P24C08C-SSH-MIR from PUYA, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect on P24C08C. Pin 1 is only used for the device address input E0 on the P24C02C variant; on P24C08C it is unbonded/internal-no-connect. Leave floating or tie to GND. |
| 2 | NC | unconnected | No connect on P24C08C. Pin 2 is used as slave-address input E1 only on P24C02C and P24C04C; on P24C08C it is unbonded/internal-no-connect. Leave floating or tie to GND. |
| 3 | E2 | input | Device address input bit 2. Hardwired address selector used to distinguish devices on the same I2C bus; must match address bit A10 of the slave address. Internally pulled down to GND, so a floating pin selects address 0. Input capacitance 6 pF max. |
| 4 | GND | power_in | Ground reference (0 V) for the device. Connect to the system ground plane; typically decoupled together with VCC using a 0.1 µF ceramic capacitor placed close to the package. |
| 5 | SDA | bidirectional | I2C bidirectional serial data line. Open-drain output that can be wire-ORed with other open-drain/collector devices on the bus; requires an external pull-up resistor to VCC (typ. 1.3 kΩ at 2.5-5.5 V, 10 kΩ at 1.7 V per Table 3-3). VOL ≤ 0.4 V @ IOL = 2.1 mA (VCC = 3 V). Input capacitance 8 pF max. |
| 6 | SCL | input | I2C serial clock input. Positive edge clocks data into the device; negative edge clocks data out. Maximum clock frequency 1 MHz (VCC ≥ 2.5 V) or 400 kHz (1.7 V ≤ VCC < 2.5 V). Schmitt-trigger, filtered input; input capacitance 6 pF max. |
| 7 | WCB | input | Write control (active-low). Tie to GND (or leave floating; internally pulled down to GND) to enable normal write operations. Drive high / tie to VCC to hardware-inhibit all writes to the memory array. Setup/hold times 0.6 µs (VCC ≥ 2.5 V) or 1.2 µs (< 2.5 V). |
| 8 | VCC | power_in | Positive supply input. Operating range 1.7 V to 5.5 V for the -MI grade (this MPN). Read supply current 0.4 mA max @ 400 kHz; write supply current 1.6 mA max @ 400 kHz; standby 1 µA typ at 3.3 V/85 °C. Decouple with 0.1 µF close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | PUYA |
| Package | SOP-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
P24C08C-SSH-MIRSSH-MIRP24C08C-SSH-MIRSSH-MITP24C08C-SSH-MIRSSHP24C08C-SSH-MIRDPHP24C08C-SSH-MIRTSHP24C08C-SSH-MIRDNHP24C08C-SSH-MIRUNHP24C08C-SSH-MIRSTHP24C08C-SSH-MIRTOHP24C08C-SSH-MIRC6H
CAD (KiCad official)
- Symbol:
P24C08C-SSH-MIR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: PUYA datasheet (None pp, sha256
56460f551ddc4cc4, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).