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OPT3101RHFR

Texas Instruments · Position Sensor · QFN-28-EP(4x5)

OPT3101RHFR from Texas Instruments, in a QFN-28-EP(4x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A1 input I2C slave address bit LSB1. Selects the lower address bits of the device. Referenced to AVDD I/O domain.
2 A2 input I2C slave address bit LSB2. Selects the lower address bits of the device. Referenced to AVDD I/O domain.
3 IOVSS power_in Ground return for the digital and I/O supply (IOVDD).
4 TX2 output Illumination driver output (channel 2). Connects to the cathode of the emitter LED/laser diode; the anode connects to the supply. Programmable current up to 173.6 mA; VDRV range 0.7 V to 3.6 V.
5 TX1 output Illumination driver output (channel 1). Connects to the cathode of the emitter LED/laser diode; anode to supply. Programmable current up to 173.6 mA.
6 VSSL power_in Illumination driver ground. Dedicated low-inductance return for the TX0/TX1/TX2 emitter current.
7 TX0 output Illumination driver output (channel 0). Connects to the cathode of the emitter LED/laser diode; anode to supply. Programmable current up to 173.6 mA.
8 IOVSS power_in Ground return for the digital and I/O supply (IOVDD).
9 IOVDD power_in 1.7 V to 3.6 V supply for the digital I/O and internal illumination driver logic. Bypass to IOVSS.
10 IOVDD power_in 1.7 V to 3.6 V supply for the digital I/O and internal illumination driver logic. Bypass to IOVSS.
11 GP1 output General-purpose output. IOVDD I/O domain.
12 GP2 bidirectional General-purpose I/O; can also be configured as CLKREF input for the modulation clock. IOVDD I/O domain.
13 SCL_S input I2C slave clock. Requires a 10 kΩ pull-up to 3.3 V. IOVDD I/O domain.
14 SDA_S bidirectional I2C slave data (open-drain). Requires a 10 kΩ pull-up to 3.3 V. IOVDD I/O domain.
15 SCL_M output I2C master clock (for optional external temperature sensor / peripheral). Requires a 10 kΩ pull-up to 3.3 V.
16 SDA_M bidirectional I2C master data (open-drain). Requires a 10 kΩ pull-up to 3.3 V.
17 RST_MS input Active-low, monostable-triggered global reset. No internal pull-up; must be driven by host or externally pulled up. IOVDD I/O domain.
18 REG_MODE input Selects the mode of the internal 1.8 V LDO regulator that produces AVDD and DVDD from AVDD3. IOVDD I/O domain.
19 DVDD power_in 1.8 V digital core supply (nominal 1.8 V, range 1.7-1.9 V). Can be supplied externally or by the internal LDO from AVDD3.
20 AVDD3 power_in 3.3 V analog supply (range 3.0-3.6 V). Also feeds the internal LDO when the on-chip 1.8 V regulator is enabled.
21 AVDD power_in 1.8 V analog supply (range 1.7-1.9 V). Can be supplied externally or by the internal LDO from AVDD3.
22 NC unconnected No internal connection. May be left floating or tied to ground.
23 AVSS power_in Analog ground return.
24 INM input AFE negative input. Connect the photodiode-equivalent bypass capacitor here; the other end of the capacitor returns to AVSS. Bias voltage VR ≈ 1 V.
25 INP input AFE positive input. Connect the anode of the photodiode here (cathode to AVSS). Bias voltage VR ≈ 1 V; max input photodiode capacitance 6 pF.
26 AVSS power_in Analog ground return.
27 AVSS power_in Analog ground return.
28 A0 input I2C slave address bit LSB0. Selects the lower address bits of the device. Referenced to AVDD I/O domain.
PAD Thermal Pad power_in Exposed thermal pad on the package bottom. Connect through multiple vias to the AVSS PCB ground plane for proper thermal performance and electrical grounding.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-28-EP(4x5)
Category Sensor
Pins 29

Ordering variants

Same part, different packaging or reel option.

  • OPT3101RHFR
  • OPT3101RHFRRHFT

CAD (KiCad official)

  • Symbol: OPT3101RHFR
  • Footprint: Package_DFN_QFN:QFN-28-1EP_4x5mm_P0.5mm_EP2.65x3.65mm
  • 3D model: QFN-28-EP(4x5) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
opt3101rhfr.step 308 KB You want the bare part, or you mark your own boards.
opt3101rhfr-etched.step 2.3 MB You want the part with OPT3101RHFR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 589 faces against 182 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (116 pp, sha256 d2e248f208968588, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF