component

OP07EDRG

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by Ray

HANSCHIP semiconductor Operational Amplifier, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

componentop-amp-cmpop07edrg
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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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OP07EDRG

HANSCHIP semiconductor · Operational Amplifier · SOP-8

OP07EDRG from HANSCHIP semiconductor, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOS_TRIM passive Offset voltage trim / null pin. Connect a 20kΩ potentiometer between pins 1 and 8 with the wiper tied to V+ (VCC+) to null the input offset voltage.
2 -IN input Inverting input of the op-amp. Input common-mode range ±13V typical; input bias current ~28nA max at ±15V supply.
3 +IN input Non-inverting input of the op-amp. Input common-mode range ±13V typical; input bias current ~28nA max at ±15V supply.
4 V- power_in Negative supply rail. Operating range ±3V to ±20V (dual supply). Absolute max supply voltage ±20V.
5 NC unconnected No connect. Leave floating; datasheet explicitly notes 'NC = NO CONNECT'.
6 OUT output Op-amp output. Output swing typ ±12V with RL=10kΩ, ±11.5V with RL=2kΩ at ±15V supply. Gain-bandwidth product 0.5MHz.
7 V+ power_in Positive supply rail. Operating range ±3V to ±20V (dual supply). Quiescent current ~3.8mA typ (6mA max) at ±15V, no load.
8 VOS_TRIM passive Offset voltage trim / null pin. Connect a 20kΩ potentiometer between pins 1 and 8 with the wiper tied to V+ (VCC+) to null the input offset voltage.

Key specifications

Parameter Value
Manufacturer HANSCHIP semiconductor
Package SOP-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • OP07EDRG
  • OP07EDRGEPG
  • OP07EDRGEDGKRG

CAD (KiCad official)

  • Symbol: OP07EDRG
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
op07edrg.step 122 KB You want the bare part, or you mark your own boards.
op07edrg-etched.step 1.7 MB You want the part with OP07EDRG already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 431 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HANSCHIP semiconductor datasheet (7 pp, sha256 43b8d64678d51209, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF