component
NE556M
Public Unreviewedby Ray
HGSEMI Timers / Clock Oscillators, SOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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markdownNE556M
HGSEMI · Timers / Clock Oscillators · SOP-14
NE556M from HGSEMI, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIS1 | output | Discharge pin for timer 1. Open-collector output that discharges the external timing capacitor when the internal flip-flop is in the reset state. |
| 2 | THR1 | input | Threshold input for timer 1. When the voltage on this pin exceeds 2/3 VCC, the internal flip-flop is reset, ending the timing interval. |
| 3 | OUT1 | output | Output of timer 1. Push-pull output capable of sourcing or sinking up to 200 mA; swings between near-ground and near-VCC. |
| 4 | RST1 | input | Reset input for timer 1 (active low). Pulling this pin below ~0.7V forces the output low and discharges the timing capacitor regardless of other inputs. Tie to VCC when unused. |
| 5 | CON1 | input | Control voltage input for timer 1. Allows direct access to the 2/3 VCC internal reference divider to modify timing thresholds or perform pulse-width modulation. Bypass to GND with 0.01 uF if unused. |
| 6 | TRG1 | input | Trigger input for timer 1 (active low). A negative-going pulse below 1/3 VCC starts the timing interval and drives the output high. |
| 7 | GND | power_in | Device ground reference. Common return for both timers and all internal circuitry. |
| 8 | TRG2 | input | Trigger input for timer 2 (active low). A negative-going pulse below 1/3 VCC starts the timing interval and drives the output high. |
| 9 | CON2 | input | Control voltage input for timer 2. Allows direct access to the 2/3 VCC internal reference divider to modify timing thresholds or perform pulse-width modulation. Bypass to GND with 0.01 uF if unused. |
| 10 | RST2 | input | Reset input for timer 2 (active low). Pulling this pin below ~0.7V forces the output low and discharges the timing capacitor regardless of other inputs. Tie to VCC when unused. |
| 11 | OUT2 | output | Output of timer 2. Push-pull output capable of sourcing or sinking up to 200 mA; swings between near-ground and near-VCC. |
| 12 | THR2 | input | Threshold input for timer 2. When the voltage on this pin exceeds 2/3 VCC, the internal flip-flop is reset, ending the timing interval. |
| 13 | DIS2 | output | Discharge pin for timer 2. Open-collector output that discharges the external timing capacitor when the internal flip-flop is in the reset state. |
| 14 | VCC | power_in | Positive supply voltage, 4.5V to 16V. Powers both internal timer sections; bypass locally with a 0.1 uF ceramic to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HGSEMI |
| Package | SOP-14 |
| Category | RTC |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
NE556MMNE556MNNE556MP
CAD (KiCad official)
- Symbol:
NE556M - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HGSEMI datasheet (9 pp, sha256
fdee0501f2001d17, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).