Loads on click. Unloads when scrolled away or the tab is hidden.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.

PCB Footprint

Open full view ↗
Loads on click. Unloads when scrolled away or the tab is hidden.
Loads on click. Unloads when scrolled away or the tab is hidden.
Download PDF
Contents

README

markdown

NE556DR

Texas Instruments · Timers / Counters · SOIC-14

NE556DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1DIS output Timer 1 discharge. Open-collector output that discharges the external timing capacitor when the internal flip-flop is set.
2 1THRES input Timer 1 threshold input. When voltage rises above 2/3 VCC, the internal flip-flop resets and the output goes low.
3 1CONT input Timer 1 control voltage. Access to the internal 2/3 VCC reference; can be used to modulate output pulse width. Typically bypassed to GND with 10 nF.
4 1RESET input Timer 1 reset. Active-low; forces output low and discharge on when driven below ~0.7 V. Tie to VCC if unused.
5 1OUT output Timer 1 output. Push-pull output capable of sourcing/sinking up to 200 mA; swings between near-GND and near-VCC.
6 1TRIG input Timer 1 trigger. When driven below 1/3 VCC, sets the internal flip-flop and drives the output high.
7 GND power_in Device ground reference (0 V). Common return for both timers.
8 2TRIG input Timer 2 trigger. When driven below 1/3 VCC, sets the internal flip-flop and drives the output high.
9 2OUT output Timer 2 output. Push-pull output capable of sourcing/sinking up to 200 mA; swings between near-GND and near-VCC.
10 2RESET input Timer 2 reset. Active-low; forces output low and discharge on when driven below ~0.7 V. Tie to VCC if unused.
11 2CONT input Timer 2 control voltage. Access to the internal 2/3 VCC reference; can be used to modulate output pulse width. Typically bypassed to GND with 10 nF.
12 2THRES input Timer 2 threshold input. When voltage rises above 2/3 VCC, the internal flip-flop resets and the output goes low.
13 2DIS output Timer 2 discharge. Open-collector output that discharges the external timing capacitor when the internal flip-flop is set.
14 VCC power_in Positive supply voltage, 4.5 V to 16 V (NE556). Bypass to GND with 100 nF near the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Clock/Timing
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • NE556DR
  • NE556DRD
  • NE556DRN
  • NE556DRP

CAD (KiCad official)

  • Symbol: NE556DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 63e3e49f1c2acba3, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF