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NCP3235MNTXG

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by Ray

onsemi DC-DC Converters, QFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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NCP3235MNTXG

onsemi · DC-DC Converters · QFN-40-EP(6x6)

NCP3235MNTXG from onsemi, in a QFN-40-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SS input Soft-start pin. A capacitor from this pin to GND allows the user to adjust the soft-start ramp time.
2 FB input Output voltage feedback input to the internal error amplifier (reference 0.6 V).
3 COMP output Output of the internal error amplifier; used for loop compensation.
4 ISET input A resistor from this pin to ground sets the over-current protection (OCP) threshold (RDS(on)/ISET ≈ 108 Ω/A).
5 AGND power_in Analog ground reference for control circuitry.
6 MODE input Mode selection for FCCM mode and automatic CCM/DCM mode, switching frequency, and hiccup/latch protection mode. See table in datasheet.
7 PG output Power good indicator of the output voltage. Open-drain output; connect PG to VDD with an external pull-up resistor.
8 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin. 4.5 V to 23 V input range.
9 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin.
10 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin.
11 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin.
12 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin.
13 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin.
14 VIN power_in Input power connection to the drain of the internal high-side power NMOS switch. Decouple to ground close to the pin.
15 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches. At switch off, the inductor drives this pin below ground through the body diode and the NMOS conducts with high dv/dt.
16 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
17 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
18 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
19 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
20 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
21 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
22 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
23 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
24 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
25 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
26 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
27 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
28 PGND power_in Power ground reference and high-current return path for the bottom gate driver and low-side NMOS.
29 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches.
30 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches.
31 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches.
32 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches.
33 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches.
34 VSWH power_out Switch node - connection of the drain and source of the internal NMOS switches.
35 VSW input IC connection to the switch node between the top MOSFET and bottom MOSFET. Return path of the high-side gate driver.
36 BST power_in Top gate driver input supply; bootstrap capacitor connection between the switch node (VSW) and this pin.
37 AGND power_in Analog ground reference for control circuitry.
38 VB power_out Internal LDO output and supply for the NCP3235 (typ 5.15 V). Connect a minimum 4.7 µF ceramic capacitor from this pin to ground.
39 VCC power_in Input supply for the IC. This pin must be connected to VIN (or an external 5 V rail per Figure 3).
40 EN input Enable logic input. Internal pull-up enables the device automatically; drive high to enable, low to disable. A comparator + precision reference (1.2 V) allows this pin to implement an adjustable UVLO circuit.
EP41 GND power_in Exposed pad. Connect GND to a large copper plane at ground potential to improve thermal dissipation.
EP42 VIN power_in Exposed pad tied to VIN (drain of internal high-side power NMOS). Connect to a large VIN copper plane for current handling and thermal dissipation.
EP43 VSWH power_out Exposed pad tied to the switch node (VSWH). Connect to a large copper plane for current handling and thermal dissipation.

Key specifications

Parameter Value
Manufacturer onsemi
Package QFN-40-EP(6x6)
Category PMIC
Pins 43

Ordering variants

Same part, different packaging or reel option.

  • NCP3235MNTXG

CAD (KiCad official)

  • Symbol: NCP3235MNTXG
  • Footprint: Package_DFN_QFN:QFN-40-1EP_6x6mm_P0.5mm_EP4.6x4.6mm
  • 3D model: QFN-40-EP(6x6) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (17 pp, sha256 25b7c228692098e7, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF