component
ncl30488a2dr2g
Public Unreviewedby Ray
onsemi LED Drivers, SOIC-7. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownNCL30488A2DR2G
onsemi · LED Drivers · SOIC-7
NCL30488A2DR2G from onsemi, in a SOIC-7. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | OTA output for the CV loop. External compensation network (R1, C1, C2 type-2 compensator) attached here stabilizes the constant-voltage regulation loop. Clamped between VCV(clampL) ~0.6 V and VCV(clampH) ~4.12 V; internal divider KCOMP=4 maps VCOMP to VREFX. |
| 2 | ZCD | input | Zero-crossing detection / Vaux sensing pin. Connects to the auxiliary winding via a resistor divider to detect core reset (valley) events and to sense the auxiliary-winding voltage for accurate primary-side output voltage regulation. Thresholds: VZCD(rising)~90 mV, VZCD(falling)~55 mV; 200 kΩ internal pull-down. |
| 3 | CS | input | Primary peak current sense input. Monitors the voltage across the primary-side current-sense resistor for cycle-by-cycle peak current limiting (VILIM ~1.4 V) and winding/output-diode short-circuit detection (VCS(stop) ~2.0 V, 140% of VILIM). Leading-edge blanking tLEB ~345 ns. |
| 4 | GND | power_in | Controller ground reference. Return for VCC supply current and reference for all pin voltages. Non-connection is detected via CS-pin ESD diode monitoring (200 µs fault window). |
| 5 | DRV | output | Gate driver output to the external power MOSFET. Clamped to VDRV(high) ~12 V (10-14 V) when VCC is high, otherwise follows VCC. Drive capability ~500 mA sink / 300 mA source; RSNK ~13 Ω, RSRC ~30 Ω; tr ~30 ns / tf ~20 ns (CDRV=470 pF). |
| 6 | VCC | power_in | Controller supply pin, fed from an external auxiliary winding once running. Startup VCC(on) ~18 V, UVLO VCC(off) ~10.2 V, VCC(OVP) ~26.5 V, absolute max 30 V. Operating current: ~1.35 mA disabled, ~3.0-3.5 mA switching at 65 kHz. |
| 7 | NC | unconnected | No connect; pin removed for high-voltage creepage between the HV pin (pin 8) and the low-voltage pins. Package is a SOIC-7 (SOIC-8 body with pin 7 omitted). |
| 8 | HV | input | High-voltage sensing / startup pin. Connects after the diode bridge (up to 700 V absolute max) to provide the internal high-voltage startup current source (IHV(start1) ~300 µA, IHV(start2) ~5.1 mA) and to sense the rectified line for PFC shaping, brown-out (~108 V on / ~98 V off), and line OVP (~469 V trip, ~443 V reset). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-7 |
| Category | LED-drv |
| Pins | 8 |
Ordering variants
NCL30488A2DR2GNCL30488A2DR2GNCL30488A3DR2GNCL30488A2DR2GNCL30488A4DR2G
CAD (KiCad official)
- Symbol:
NCL30488A2DR2G - Footprint:
Package_SO:SOIC-8-N7_3.9x4.9mm_P1.27mm - 3D model: SOIC-7 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (None pp, sha256
4ac8c0282fc5de4d, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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