NCL30125B2DR2G from onsemi, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	HV	power_in	High-voltage startup pin (up to 700 V abs max). Connected to the rectified AC line or bulk rail through diodes/resistors to power the internal current source that charges the Vcc capacitor at startup (~11 mA typ) and supports Dynamic Self-Supply (DSS).
2	NC	unconnected	No connect. Pin position is omitted from the SOIC-16 package for improved creepage between the HV pin (pin 1) and the Fault pin (pin 3).
3	Fault	input	Combined latching OVP/OTP fault input. Controller latches off if VFault is pulled above VFault(OVP) = 2.5 V typ or below VFault(OTP) = 0.4 V typ. Provides a 50 uA pull-up current source (100 uA boosted during startup blanking) suitable for direct interface with an NTC thermistor.
4	BO	input	Brown-out and line-OVP sense input. Monitors a scaled version of the bulk/input voltage through a resistor divider. Controller starts pulsing when VBO > 0.80 V typ and stops after a 50 ms filter when VBO < 0.70 V typ; also provides a line-OVP shutdown above 2.9 V typ.
5	FB	input	Feedback input from the secondary-side regulation loop, typically driven by an optocoupler collector. Internally pulled up to VFB(ref) ~4.3 V through 11.6 kOhm. VFB is divided by KFB = 4 to set the peak current setpoint; skip mode is entered below Vskip = 0.3 V.
6	RT	input	Switching-frequency programming pin. A resistor to GND sets fSW between 50 kHz and 300 kHz (e.g. 200 kOhm -> 51 kHz, 100 kOhm -> 100 kHz, 32 kOhm -> 300 kHz). RRT = (1/fSW - 120 ns) * 1e10.
7	SS	output	Soft-start programming pin. External capacitor to GND is charged by an internal 5.2 uA current source; SS voltage divided by 4 clamps the CS peak-current setpoint until it reaches VSS = 2.0 V typ. Internally discharged on fault (OCP, UVLO, BO).
8	FW	output	Auxiliary gate-drive output for the bootstrap-refresh MOSFET (M3). Used to refresh the bootstrap capacitor during startup (tboot(start) ~ 200 us) and during skip mode. Peak +100 mA / -200 mA drive; clamped at ~12.7 V; max continuous current in high state limited to 10 mA.
9	CS	input	Primary current-sense input. Sets peak current via VILimit = 0.5 V typ, with a 2nd OCP threshold VCS(stop) = 0.75 V typ for abnormal overcurrent. Adaptive LEB (200-300 ns) and a 60 uA startup pull-up for open-pin detection. Also used to inject internal ramp compensation via internal 26.5 kOhm.
10	Vcc	power_in	Primary controller supply. VCC(on) = 16 V typ, VCC(min) = 10 V typ, VCC(off) = 8.8 V typ, absolute maximum 35 V. An internal OVP comparator trips at Vcc(OVP) = 25.9 V typ with 20 us blanking to protect against optocoupler faults.
11	GND	power_in	Controller ground return for all low-voltage circuitry and the DRV_LO/FW driver return path.
12	DRV_LO	output	Low-side MOSFET gate driver output. Peak +0.9 A / -1.2 A source/sink; ~13.5 V active clamp (16 V max) to protect the external MOSFET gate. 13 ns typ rise/fall into 1 nF.
13	NC	unconnected	No connect. Pin position is omitted from the SOIC-16 package for improved creepage between DRV_LO (pin 12) and DRV_HI (pin 14).
14	DRV_HI	output	High-side MOSFET gate driver output. Referenced to the HB pin and powered from Boot (floating bootstrap supply). Peak +0.9 A / -1.2 A source/sink; upper UVLO ensures adequate VGS before switching.
15	HB	passive	Half-bridge switching-node return for the high-side driver. Connects to the source of the high-side MOSFET / drain of the low-side MOSFET; serves as reference for DRV_HI and Boot. VBoot - VHB must not exceed 20 V.
16	Boot	power_in	Floating bootstrap supply for the high-side driver. External bootstrap capacitor tied between Boot and HB is refreshed via an external diode from Vcc and/or through the FW-driven refresh MOSFET. VBoot(on) = 8.5 V typ, VBoot(off) = 7.9 V typ, absolute max 620 V referenced to GND.

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	SOIC-16
Category	LED Drivers
Pins	16

Ordering variants

Same part, different packaging or reel option.

NCL30125B2DR2GA2DR2G
NCL30125B2DR2G

CAD (KiCad official)

Symbol: NCL30125B2DR2G
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (None pp, sha256 7c36d2268817fc90, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF