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Contents

README

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NC7SZ00M5X

onsemi · Gates · SOT-23-5

NC7SZ00M5X from onsemi, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Logic input A of the 2-input NAND gate. CMOS input, high-impedance when VCC = 0 V; tolerates 0-5.5 V independent of VCC. Must be held HIGH or LOW (may not float).
2 B input Logic input B of the 2-input NAND gate. CMOS input, high-impedance when VCC = 0 V; tolerates 0-5.5 V independent of VCC. Must be held HIGH or LOW (may not float).
3 GND power_in Ground reference (0 V).
4 Y output NAND gate output. Y = NOT(A AND B). CMOS push-pull output, ±24 mA drive at VCC = 3 V; high-impedance when VCC = 0 V.
5 VCC power_in Supply voltage input. Operating range 1.65 V to 5.5 V (1.5 V minimum for data retention). Bypass to GND with a local decoupling capacitor.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-23-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • NC7SZ00M5X
  • NC7SZ00M5XP5X
  • NC7SZ00M5XL6X

CAD (KiCad official)

  • Symbol: NC7SZ00M5X
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 a7d3c721c8dbbefc, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF