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N32WB452REQ6

Nations Technologies Inc · Microcontrollers (MCU/MPU/SOC) · QFN-64-EP(8x8)

N32WB452REQ6 from Nations Technologies Inc, in a QFN-64-EP(8x8). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VBAT power_in Battery / main power supply input, 1.8-3.6 V. Powers the RTC and backup domain when VDD is absent.
2 PC13-TAMPER-RTC bidirectional General-purpose I/O PC13, muxable to TAMPER input and RTC alarm/second output. Supplied from the backup domain - limited output drive (~3 mA, 2 MHz, 30 pF max).
3 PC14-OSC32_IN bidirectional GPIO PC14 or 32.768 kHz LSE oscillator input. Backup domain pin (limited drive).
4 PC15-OSC32_OUT bidirectional GPIO PC15 or 32.768 kHz LSE oscillator output. Backup domain pin (limited drive).
5 PD0-OSC_IN bidirectional After reset configured as HSE crystal oscillator input (OSC_IN, 4-32 MHz). May be reassigned as GPIO PD0.
6 PD1-OSC_OUT bidirectional After reset configured as HSE crystal oscillator output (OSC_OUT). May be reassigned as GPIO PD1.
7 NRST bidirectional Active-low system reset. Bidirectional with internal pull-up; asserted externally or by internal reset sources.
8 PC0 bidirectional GPIO PC0; alt: ADC12_IN6, I2C3_SCL, DVP_D2, UART6_TX. TTa I/O.
9 VSSA power_in Analog ground reference for ADC/DAC and analog blocks.
10 VDDA power_in Analog supply for ADC/DAC and analog blocks, 1.8-3.6 V. Tie to VDD through an LC filter for best analog performance.
11 PA0-WKUP bidirectional GPIO PA0 with wake-up input; alt: USART2_CTS, ADC1_IN1, TIM2/5/8 CH1/ETR, SPI3_MISO.
12 PA1 bidirectional GPIO PA1; alt: USART2_RTS, ADC1_IN2, TIM2/5_CH2, DVP_HSYNC, SPI3_MOSI/I2S3_SD.
13 PA2 bidirectional GPIO PA2; alt: USART2_TX, TIM5_CH3, ADC12_IN11, TIM2_CH3, DVP_VSYNC.
14 PA3 bidirectional GPIO PA3; alt: USART2_RX, TIM5_CH4, ADC1_IN4, TIM2_CH4, DVP_PCLK.
15 VSS_4 power_in Digital core ground.
16 VDD_4 power_in Digital I/O supply, 1.8-3.6 V.
17 PA4 bidirectional GPIO PA4; alt: SPI1_NSS, USART2_CK, DAC_OUT1, ADC2_IN1, DVP_D0, TSC_CHN0, I2C2_SCL.
18 PA5 bidirectional GPIO PA5; alt: SPI1_SCK, DAC_OUT2, ADC2_IN2, DVP_D1, TSC_CHN1, I2C2_SDA.
19 PA6 bidirectional GPIO PA6; alt: SPI1_MISO, TIM8_BKIN/TIM1_BKIN, ADC1_IN3, TIM3_CH1, DVP_D2.
20 PA7 bidirectional GPIO PA7; alt: SPI1_MOSI, TIM8_CH1N/TIM1_CH1N, ADC2_IN4, TIM3_CH2, DVP_D3.
21 PB0 bidirectional GPIO PB0; alt: TIM3_CH3, TIM8_CH2N, DVP_D6, TIM1_CH2N, UART6_TX.
22 PB1 bidirectional GPIO PB1; alt: ADC2_IN3, TIM3_CH4, TIM8_CH3N, DVP_D7, TIM1_CH3N, UART6_RX.
23 PB2-BOOT1 bidirectional GPIO PB2, also BOOT1 strap. Alt: ADC2_IN13, DVP_D3, UART4_TX, SPI1_NSS.
24 PB10 bidirectional GPIO PB10; alt: I2C2_SCL, USART3_TX, TIM2_CH3, XFMC_D11, DVP_D4.
25 PB11 bidirectional GPIO PB11; alt: I2C2_SDA, USART3_RX, TIM2_CH4, XFMC_D12, DVP_D5.
26 VSS_1 power_in Digital core ground.
27 VDD_1 power_in Digital I/O supply, 1.8-3.6 V.
28 PB12 bidirectional GPIO PB12; alt: SPI2_NSS/I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, CAN2_RX.
29 BLE_SWITCH power_in BLE radio power/mode switch control (dedicated BLE subsystem pin). Connect per Nations BLE reference application circuit.
30 PB13 bidirectional GPIO PB13; alt: SPI2_SCK/I2S2_CK, USART3_CTS, TIM1_CH1N, CAN2_TX, UART5_TX.
31 PB14 bidirectional GPIO PB14; alt: SPI2_MISO, TIM1_CH2N, USART3_RTS, TSC_CHN2, UART5_RX.
32 PB15 bidirectional GPIO PB15; alt: SPI2_MOSI/I2S2_SD, TIM1_CH3N, TSC_CHN3.
33 BLE_VDCDC power_in BLE DC-DC converter supply node. Connect per Nations BLE reference application circuit (DC-DC mode Fig. 3-4).
34 BLE_VCC power_in BLE analog / radio supply. Connect per Nations BLE reference application circuit.
35 PC6 bidirectional GPIO PC6; alt: I2S2_MCK, TIM8_CH1, SDIO_D6, I2C4_SCL, TSC_CHN8, TIM3_CH1, SPI2_NSS/I2S2_WS, USART2_CTS, XFMC_A16.
36 PC7 bidirectional GPIO PC7; alt: I2S3_MCK, TIM8_CH2, SDIO_D7, I2C4_SDA, TSC_CHN9, TIM3_CH2, SPI2_SCK/I2S2_CK, USART2_RTS, XFMC_A17.
37 PC8 bidirectional GPIO PC8; alt: TIM8_CH3, SDIO_D0, TSC_CHN10, TIM3_CH3, SPI2_MISO, USART2_TX.
38 PC9 bidirectional GPIO PC9; alt: TIM8_CH4, SDIO_D1, TSC_CHN11, TIM3_CH4, SPI2_MOSI/I2S2_SD, USART2_RX, XFMC_NOE.
39 PA8 bidirectional GPIO PA8; 5 V tolerant. Alt: USART1_CK, TIM1_CH1, MCO (clock output).
40 PA9 bidirectional GPIO PA9; 5 V tolerant. Alt: USART1_TX, TIM1_CH2, TSC_DOUT, I2C4_SCL.
41 BLE_RFIOP bidirectional BLE 2.4 GHz RF antenna port (single-ended, internally matched via on-chip balun). Route as 50 Ω to the antenna network per reference schematic.
42 BLE_VDCDCCRF power_in BLE RF DC-DC/decoupling node. Connect per Nations BLE reference application circuit.
43 PA10 bidirectional GPIO PA10; 5 V tolerant. Alt: USART1_RX, TIM1_CH3, I2C4_SDA, XFMC_MWE.
44 PA11-USB_DM bidirectional USB 2.0 Full-Speed device D- when USB is enabled; otherwise GPIO PA11 (5 V tolerant). Alt: USART1_CTS, CAN1_RX, TIM1_CH4.
45 PA12-USB_DP bidirectional USB 2.0 Full-Speed device D+ when USB is enabled; otherwise GPIO PA12 (5 V tolerant). Alt: USART1_RTS, CAN1_TX, TIM1_ETR.
46 PA13-SWDIO bidirectional After reset: JTMS / SWDIO serial-wire debug data. May be reassigned to GPIO PA13 or UART4_TX. 5 V tolerant.
47 VSS_2 power_in Digital core ground.
48 VDD_2 power_in Digital I/O supply, 1.8-3.6 V.
49 PA14-SWCLK bidirectional After reset: JTCK / SWCLK serial-wire debug clock. May be reassigned to GPIO PA14 or UART4_RX. 5 V tolerant.
50 PA15 bidirectional After reset: JTDI. Alt: SPI3_NSS/I2S3_WS, PA15 GPIO, SPI1_NSS, USART2_CTS, TIM8_CH1N, TIM2_CH1_ETR. 5 V tolerant.
51 PC10 bidirectional GPIO PC10; alt: UART4_TX, SDIO_D2, TSC_CHN12, USART3_TX, SPI3_SCK/I2S3_CK.
52 PC12 bidirectional GPIO PC12; alt: UART5_TX, SDIO_CK, TSC_CHN14, USART3_CK, SPI3_MOSI/I2S3_SD, TIM8_CH2N.
53 PD2 bidirectional GPIO PD2; alt: TIM3_ETR, UART5_RX, SDIO_CMD, TSC_CHN15, SPI3_NSS/I2S3_WS, TIM8_CH3N.
54 BLE_DVDD power_in BLE digital supply. Connect per Nations BLE reference application circuit.
55 BLE_XO32MM passive BLE 32 MHz crystal oscillator terminal (M, minus side). Connect the 32 MHz XTAL and load caps per reference schematic.
56 BLE_XO32MP passive BLE 32 MHz crystal oscillator terminal (P, plus side). Pair with BLE_XO32MM to the 32 MHz XTAL.
57 PB3 bidirectional After reset: JTDO. Alt: PB3 GPIO, TRACESWO, TIM2_CH2, SPI1_SCK/SPI3_SCK/I2S3_CK, USART2_RTS, TIM8_BKIN. 5 V tolerant.
58 PB4 bidirectional After reset: NJTRST. Alt: PB4 GPIO, SPI3_MISO/SPI1_MISO, TIM3_CH1, USART2_TX, TIM8_ETR. 5 V tolerant.
59 PB5 bidirectional GPIO PB5; alt: I2C1_SMBA, SPI3_MOSI/I2S3_SD, TIM3_CH2, SPI1_MOSI, CAN2_RX, USART2_RX, TIM1_BKIN. 5 V tolerant.
60 PB6 bidirectional GPIO PB6; alt: I2C1_SCL, TIM4_CH1, TSC_CHN20, USART1_TX, CAN2_TX, XFMC_NE2/NCE3.
61 PB7 bidirectional GPIO PB7; alt: I2C1_SDA, XFMC_NADV, TIM4_CH2, TSC_CHN21, USART1_RX.
62 BOOT0 input Boot-mode select input sampled at reset. Together with BOOT1 selects boot from main Flash, system memory (bootloader), or SRAM.
63 VSS_3 power_in Digital core ground.
64 VDD_3 power_in Digital I/O supply, 1.8-3.6 V.

Key specifications

Parameter Value
Manufacturer Nations Technologies Inc
Package QFN-64-EP(8x8)
Category MCU
Pins 64

Ordering variants

Same part, different packaging or reel option.

  • N32WB452REQ6CEQ6
  • N32WB452REQ6
  • N32WB452REQ6LEQ6

CAD (KiCad official)

  • Symbol: N32WB452REQ6
  • Footprint: Package_DFN_QFN:QFN-64-1EP_8x8mm_P0.4mm_EP6.5x6.5mm
  • 3D model: QFN-64-EP(8x8) (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
n32wb452req6.step 1702 KB You want the bare part, or you mark your own boards.
n32wb452req6-etched.step 3.6 MB You want the part with N32WB452REQ6 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 912 faces against 398 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nations Technologies Inc datasheet (88 pp, sha256 082b04b4fedea011, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF