component
N32G435CBL7
Public Unreviewedby Ray
Nations Technologies Inc Microcontrollers (MCU/MPU/SOC), LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗README
markdownN32G435CBL7
Nations Technologies Inc · Microcontrollers (MCU/MPU/SOC) · LQFP-48(7x7)
N32G435CBL7 from Nations Technologies Inc, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Main digital supply. 1.8-3.6 V. Bypass with 100 nF + shared 4.7 uF close to the pin. |
| 2 | PC13-TAMPER-RTC | bidirectional | General-purpose I/O PC13; alt: TIM1_CH1N, EVENTOUT; option: TAMP1-RTC, RTC_OUT, WKUP2. Low-drive pin (max 3 mA out at 2 MHz, 30 pF). |
| 3 | PC14-OSC32_IN | bidirectional | GPIO PC14; option: OSC32_IN - LSE 32.768 kHz crystal input. Low-drive pin (3 mA). |
| 4 | PC15-OSC32_OUT | bidirectional | GPIO PC15; option: OSC32_OUT - LSE 32.768 kHz crystal output. Low-drive pin (3 mA). |
| 5 | PD14-OSC_IN | bidirectional | GPIO PD14; option: OSC_IN - HSE crystal input (4-32 MHz). Alt: USART2_TX, I2C2_SDA, TIM1_CH3N. |
| 6 | PD15-OSC_OUT | bidirectional | GPIO PD15; option: OSC_OUT - HSE crystal output. Alt: USART2_RX, I2C2_SCL. |
| 7 | NRST | input | Bidirectional device reset, active low. Internal pull-up. Drive low to reset the MCU. |
| 8 | VSSA/VREF- | power_in | Analog ground and negative reference for ADC/DAC. Tie to VSS at a single point. |
| 9 | VDDA/VREF+ | power_in | Analog supply and positive reference for ADC/DAC/OPAMP/COMP/TSC. 1.8-3.6 V. Bypass with 10 nF + 1 uF; VREF caps 100 nF + 1 uF. |
| 10 | PA0 | bidirectional | GPIO with rich mux: USART2_CTS, LPUART_RX, TIM2_CH1/ETR, TIM5_CH1, TIM8_ETR, SPI1_MISO, I2S1_MCK, COMP1_OUT. Analog: ADC_IN1, COMP1_INM/INP, WKUP1, TAMP2-RTC. |
| 11 | PA1 | bidirectional | GPIO. Alt: USART2_RTS, LPUART_TX, TIM5_CH2, TIM2_CH2. Analog: ADC1_IN2, COMP1_INP, OPAMP1_VINP. |
| 12 | PA2 | bidirectional | GPIO. Alt: USART2_TX, TIM5_CH3, TIM2_CH3, TSC_CH1, I2C2_SDA, COMP2_OUT. Analog: ADC_IN3, OPAMP1_VOUT, COMP1_INP, COMP2_INM. |
| 13 | PA3 | bidirectional | GPIO. Alt: USART2_RX, LPUART_RX, TIM5_CH4, TIM2_CH4, I2C2_SCL, TSC_CH4. Analog: ADC_IN4, COMP1_INP, COMP2_INP, OPAMP1_VINM. |
| 14 | PA4 | bidirectional | GPIO. Alt: USART2_CK, LPUART_TX, I2C1_SCL, SPI1_NSS, I2S1_WS, USART1_TX, TSC_CH5. Analog: DAC_OUT, ADC_IN5, COMP1_INM, COMP2_INM, OPAMP1_VINP, OPAMP2_VINP. |
| 15 | PA5 | bidirectional | GPIO. Alt: SPI1_SCK, I2C1_SDA, I2S1_CK, USART1_RX, TSC_CH6. Analog: ADC_IN6, COMP1/2_INM, OPAMP1/2_VINP. |
| 16 | PA6 | bidirectional | GPIO. Alt: LPUART_CTS, SPI1_MISO, I2S1_MCK, TIM8_BKIN, TIM3_CH1, TIM1_BKIN, COMP2_OUT, TSC_CH23. Analog: ADC_IN7, OPAMP2_VOUT, COMP2_INM/INP. |
| 17 | PA7 | bidirectional | GPIO. Alt: SPI1_MOSI, I2S1_SD, TIM1_CH1N, TIM8_CH1N, TIM3_CH2, COMP2_OUT, TSC_CH20. Analog: ADC_IN8, COMP2_INP, OPAMP1/2_VINP. |
| 18 | PB0 | bidirectional | GPIO. Alt: TIM1_CH2N, TIM3_CH3, TIM8_CH2N, TSC_CH7, UART4_TX. Analog: ADC_IN9, OPAMP2_VOUT, OPAMP2_VINM. |
| 19 | PB1 | bidirectional | GPIO. Alt: LPUART_RTS, TIM1_CH3N, TIM3_CH4, TIM8_CH3N, TSC_CH8, UART4_RX. Analog: ADC_IN10. |
| 20 | PB2 | bidirectional | GPIO. Alt: LPTIM_OUT, TSC_CH9, TIM9_ETR. |
| 21 | PB10 | bidirectional | GPIO. Alt: USART3_TX, LPUART_TX, I2C2_SCL, TIM2_CH3, TSC_CH19. Analog: COMP1_INP. |
| 22 | PB11 | bidirectional | GPIO. Alt: USART3_RX, LPUART_RX, I2C2_SDA, TIM2_CH4, TSC_CH10. |
| 23 | VSS | power_in | Digital ground. |
| 24 | VDD | power_in | Main digital supply. 1.8-3.6 V. Bypass with 100 nF close to the pin. |
| 25 | PB12 | bidirectional | GPIO. Alt: SPI2_NSS, I2S2_WS, I2C2_SMBA, USART3_CK, TIM1_BKIN, LPUART_RTS, TSC_CH11, TIM9_CH1. |
| 26 | PB13 | bidirectional | GPIO. Alt: SPI2_SCK, I2S2_CK, USART3_CTS, I2C2_SCL, LPUART_CTS, TIM1_CH1N, TIM9_CH2, TSC_CH16. |
| 27 | PB14 | bidirectional | GPIO. Alt: SPI2_MISO, I2S2_MCK, TIM1_CH2N, USART3_RTS, I2C2_SDA, LPUART_RTS, TSC_CH12, TIM9_CH3, UART4_TX. Analog: OPAMP2_VINP. |
| 28 | PB15 | bidirectional | GPIO. Alt: UART4_RX, SPI2_MOSI, I2S2_SD, TIM1_CH3N, TIM9_CH4, TSC_CH15. |
| 29 | PA8 | bidirectional | GPIO. Alt: USART1_CK, I2C2_SMBA, TIM1_CH1, I2C2_SDA, SPI1_NSS, I2S1_WS, MCO. Option: WKUP0, TAMP3-RTC. |
| 30 | PA9 | bidirectional | GPIO. Alt: USART1_TX, I2C2_SCL, TIM1_CH2. |
| 31 | PA10 | bidirectional | GPIO. Alt: USART1_RX, I2C2_SDA, SPI1_SCK, SPI2_SCK, I2S1_CK, I2S2_CK, TIM1_CH3. |
| 32 | PA11-USB_DM | bidirectional | USB 2.0 FS Device D- (USB_DM). Also GPIO PA11; alt: USART1_CTS, SPI2_MISO, I2S2_MCK, CAN_RX, TIM1_CH4, COMP1_OUT; analog COMP2_INP. Not fail-safe. |
| 33 | PA12-USB_DP | bidirectional | USB 2.0 FS Device D+ (USB_DP). Also GPIO PA12; alt: USART1_RTS, SPI2_MOSI, I2S2_SD, CAN_TX, TIM1_ETR, COMP2_OUT; analog COMP1_INP. Not fail-safe. |
| 34 | PA13 | bidirectional | SWDIO-JTMS after reset - serial-wire debug data. GPIO alt: SPI2_NSS, I2S2_WS. |
| 35 | VSS | power_in | Digital ground. |
| 36 | VDD | power_in | Main digital supply. 1.8-3.6 V. |
| 37 | PA14 | bidirectional | SWCLK-JTCK after reset - serial-wire debug clock. GPIO alt: USART2_CK, I2C1_SDA, COMP2_OUT. |
| 38 | PA15 | bidirectional | GPIO. Alt: JTDI, USART2_CTS, I2C1_SCL, SPI1_NSS, I2S2_WS, TIM2_CH1, TIM2_ETR. Analog: COMP2_INP. |
| 39 | PB3 | bidirectional | GPIO. Alt: USART2_RTS, SPI1_SCK, I2S1_CK, TIM2_CH2, JTDO-TRACESWO. Analog: COMP1_INP, COMP2_INM. |
| 40 | PB4 | bidirectional | GPIO. Alt: USART2_TX, SPI1_MISO, I2S1_MCK, TIM3_CH1, UART5_TX. Analog: COMP1_INP. |
| 41 | PB5 | bidirectional | GPIO. Alt: USART2_RX, I2C1_SMBA, SPI1_MOSI, I2S1_SD, TIM3_CH2, UART5_RX, LPTIM_IN1. Analog: COMP1_INM. |
| 42 | PB6 | bidirectional | GPIO. Alt: USART1_TX, LPUART_TX, I2C1_SCL, SPI1_NSS, I2S1_WS, TIM1_CH2N, TIM4_CH1, SPI2_SCK, I2S2_CK, LPTIM_ETR, COMP1_OUT. |
| 43 | PB7 | bidirectional | GPIO. Alt: USART1_RX, LPUART_RX, I2C1_SDA, TIM4_CH2, TSC_OUT, LPTIM_IN2, PVD_IN. Analog: COMP2_INP. |
| 44 | PD0-BOOT0 | bidirectional | BOOT0 pin - samples boot mode at reset (0 = user Flash, 1 = system bootloader / SRAM). Doubles as GPIO PD0. Alt: TRACECK. |
| 45 | PB8 | bidirectional | GPIO. Alt: I2C1_SCL, CAN_RX, TIM4_CH3, USART1_TX, UART5_TX, COMP1_OUT. |
| 46 | PB9 | bidirectional | GPIO. Alt: I2C1_SDA, CAN_TX, TIM4_CH4, UART5_RX, COMP2_OUT. |
| 47 | VSS | power_in | Digital ground. |
| 48 | VDD | power_in | Main digital supply. 1.8-3.6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nations Technologies Inc |
| Package | LQFP-48(7x7) |
| Category | MCU |
| Pins | 48 |
Ordering variants
Same part, different packaging or reel option.
N32G435KBL7N32G435K8Q7N32G435CBL7N32G435C8L7N32G435RBL7N32G435RBL7-1
CAD (KiCad official)
- Symbol:
N32G435CBL7 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nations Technologies Inc datasheet (81 pp, sha256
05c5ab9754fa9c4f, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).