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MSPM0G1107TRGZR

Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-48(7x7)

MSPM0G1107TRGZR from Texas Instruments, in a VQFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA0/FCC_IN bidirectional 5V-tolerant open-drain GPIO PA0; wake-from-SHUTDOWN capable. Muxable to UART0_TX, I2C0_SDA, TIMA0_C0, TIMA_FAL1, TIMG8_C1, FCC_IN. Default I2C0 BSL data (BSLSDA).
2 PA1 bidirectional 5V-tolerant open-drain GPIO PA1; wake-from-SHUTDOWN capable. Muxable to UART0_RX, I2C0_SCL, TIMA0_C1, TIMA_FAL2, TIMG8_IDX, TIMG8_C0. Default I2C0 BSL clock (BSLSCL).
3 PA28 bidirectional High-drive GPIO PA28; wake-from-SHUTDOWN capable. Muxable to UART0_TX, I2C0_SDA, TIMA0_C3, TIMA_FAL0, TIMG7_C0, TIMA1_C0.
4 NRST input Active-low device reset input. Internal pull-up; assert low to reset the MCU.
5 PA31 bidirectional High-drive GPIO PA31; wake-from-SHUTDOWN capable. Muxable to UART0_RX, I2C0_SCL, TIMA0_C3N, TIMG12_C1, CLK_OUT, TIMG7_C1, TIMA1_C1.
6 VDD power_in Main digital and analog supply, 1.62V to 3.6V. Bypass with 100nF close to the pin plus a bulk 1-10µF.
7 VSS power_in Device ground return; tie to the board ground plane. The exposed thermal pad should also connect to VSS.
8 PA2/ROSC bidirectional GPIO PA2 or ROSC input (external precision resistor for SYSOSC accuracy). Muxable to TIMG8_C1, SPI0_CS0, TIMG7_C1, SPI1_CS0.
9 PA3/LFXIN bidirectional GPIO PA3 or LFXT low-frequency crystal input (32kHz). Muxable to TIMG8_C0, SPI0_CS1, UART2_CTS, TIMA0_C2, TIMG7_C0, TIMA0_C1, I2C1_SDA.
10 PA4/LFCLK_IN/LFXOUT bidirectional GPIO PA4, LFXT crystal output, or digital LFCLK input. Muxable to TIMG8_C1, SPI0_POCI, UART2_RTS, TIMA0_C3, TIMG7_C1, TIMA0_C1N, I2C1_SCL.
11 PA5/HFXIN/FCC_IN bidirectional GPIO PA5, HFXT high-frequency crystal input (4-48MHz), or FCC (Frequency Clock Counter) input. Muxable to TIMG8_C0, SPI0_PICO, TIMA_FAL1, TIMG0_C0, TIMG6_C0.
12 PA6/HFCLK_IN/HFXOUT bidirectional GPIO PA6, HFXT crystal output, or digital HFCLK input. Muxable to TIMG8_C1, SPI0_SCK, TIMA_FAL0, TIMG0_C1, TIMG6_C1, TIMA0_C2N.
13 PA7/CLK_OUT bidirectional GPIO PA7 or configurable clock output. Muxable to TIMG8_C0, TIMA0_C2, TIMG8_IDX, TIMG7_C1, TIMA0_C1.
14 PB2 bidirectional GPIO PB2. Muxable to UART3_TX, UART2_CTS, I2C1_SCL, TIMA0_C3, UART1_CTS, TIMG6_C0, TIMA1_C0.
15 PB3 bidirectional GPIO PB3. Muxable to UART3_RX, UART2_RTS, I2C1_SDA, TIMA0_C3N, UART1_RTS, TIMG6_C1, TIMA1_C1.
16 PA8 bidirectional GPIO PA8. Muxable to UART1_TX, SPI0_CS0, UART0_RTS, TIMA0_C0, TIMA1_C0N.
17 PA9/RTC_OUT/CLK_OUT bidirectional High-speed GPIO PA9 with RTC_OUT / CLK_OUT alt-functions. Muxable to UART1_RX, SPI0_PICO, UART0_CTS, TIMA0_C1, TIMA0_C0N, TIMA1_C1N.
18 PA10/CLK_OUT bidirectional High-drive GPIO PA10 with CLK_OUT alt-function; wake-from-SHUTDOWN capable. Default UART BSL TX (BSLTX). Muxable to UART0_TX, SPI0_POCI, I2C0_SDA, TIMA1_C0, TIMG12_C0, TIMA0_C2, I2C1_SDA.
19 PA11 bidirectional High-drive GPIO PA11; wake-from-SHUTDOWN capable. Default UART BSL RX (BSLRX). Muxable to UART0_RX, SPI0_SCK, I2C0_SCL, TIMA1_C1, TIMA0_C2N, I2C1_SCL.
20 PB6 bidirectional GPIO PB6. Muxable to UART1_TX, SPI1_CS0, SPI0_CS1, TIMG8_C0, UART2_CTS, TIMG6_C0, TIMA1_C0N.
21 PB7 bidirectional GPIO PB7. Muxable to UART1_RX, SPI1_POCI, SPI0_CS2, TIMG8_C1, UART2_RTS, TIMG6_C1, TIMA1_C1N.
22 PB8 bidirectional GPIO PB8. Muxable to UART1_CTS, SPI1_PICO, TIMA0_C0.
23 PB9 bidirectional GPIO PB9. Muxable to UART1_RTS, SPI1_SCK, TIMA0_C1, TIMA0_C0N.
24 PB14 bidirectional GPIO PB14. Muxable to SPI1_CS3, SPI1_POCI, SPI0_CS3, TIMG12_C1, TIMG8_IDX, TIMA0_C0.
25 PB15 bidirectional GPIO PB15. Muxable to UART2_TX, SPI1_PICO, UART3_CTS, TIMG8_C0, TIMG7_C0.
26 PB16 bidirectional GPIO PB16. Muxable to UART2_RX, SPI1_SCK, UART3_RTS, TIMG8_C1, TIMG7_C1.
27 PA12/FCC_IN bidirectional High-speed GPIO PA12 with FCC input alt-function. Muxable to UART3_CTS, SPI0_SCK, TIMG0_C0, TIMA0_C3.
28 PA13 bidirectional High-speed GPIO PA13. Muxable to UART3_RTS, SPI0_POCI, UART3_RX, TIMG0_C1, TIMA0_C3N.
29 PA14/CLK_OUT/A0_12 bidirectional High-speed GPIO PA14, ADC0 analog input channel 12, or CLK_OUT. Muxable to UART0_CTS, SPI0_PICO, UART3_TX, TIMG12_C0.
30 PA15/A1_0 bidirectional GPIO PA15 or ADC1 analog input channel 0. Muxable to UART0_RTS, SPI1_CS2, I2C1_SCL, TIMA1_C0, TIMG8_IDX, TIMA1_C0N, TIMA0_C2.
31 PA16/A1_1/FCC_IN bidirectional GPIO PA16, ADC1 analog input channel 1, or FCC input. Muxable to SPI1_POCI, I2C1_SDA, TIMA1_C1, TIMA1_C1N, TIMA0_C2N.
32 PA17/A1_2 bidirectional Wakeup-capable GPIO PA17 or ADC1 analog input channel 2. Muxable to UART1_TX, SPI1_SCK, I2C1_SCL, TIMA0_C3, TIMG7_C0, TIMA1_C0.
33 PA18/A1_3/GPAMP_IN- bidirectional Wakeup-capable GPIO PA18, ADC1 analog input channel 3, or GPAMP inverting input. Also BSL_invoke pin. Muxable to UART1_RX, SPI1_PICO, I2C1_SDA, TIMA0_C3N, TIMG7_C1, TIMA1_C1.
34 PA19/SWDIO bidirectional High-speed GPIO PA19 or Serial Wire Debug data I/O (SWDIO). Default debug pin.
35 PA20/SWCLK bidirectional GPIO PA20 or Serial Wire Debug clock input (SWCLK). Default debug pin.
36 PB17/A1_4 bidirectional GPIO PB17 or ADC1 analog input channel 4. Muxable to UART2_TX, SPI0_PICO, SPI1_CS1, TIMA1_C0, TIMA0_C2.
37 PB18/A1_5 bidirectional GPIO PB18 or ADC1 analog input channel 5. Muxable to UART2_RX, SPI0_SCK, SPI1_CS2, TIMA1_C1, TIMA0_C2N.
38 PB19/A1_6 bidirectional GPIO PB19 or ADC1 analog input channel 6. Muxable to SPI0_POCI, TIMG8_C1, UART0_CTS, TIMG7_C1.
39 PA21/A1_7/VREF- bidirectional GPIO PA21, ADC1 analog input channel 7, or external VREF negative input. Muxable to UART2_TX, TIMG8_C0, UART1_CTS, TIMA0_C0, TIMG6_C0.
40 PA22/A0_7/GPAMP_OUT bidirectional GPIO PA22, ADC0 analog input channel 7, or GPAMP output. Muxable to UART2_RX, TIMG8_C1, UART1_RTS, TIMA0_C1, CLK_OUT, TIMA0_C0N, TIMG6_C1.
41 PB20/A0_6 bidirectional GPIO PB20 or ADC0 analog input channel 6. Muxable to SPI0_CS2, SPI1_CS0, TIMA0_C2, TIMG12_C0, TIMA_FAL1, TIMA0_C1, TIMA1_C1N.
42 PB24/A0_5 bidirectional GPIO PB24 or ADC0 analog input channel 5. Muxable to SPI0_CS3, SPI0_CS1, TIMA0_C3, TIMG12_C1, TIMA0_C1N, TIMA1_C0N.
43 PA23/VREF+ bidirectional GPIO PA23 or external VREF positive input. Muxable to UART2_TX, SPI0_CS3, TIMA0_C3, TIMG0_C0, UART3_CTS, TIMG7_C0, TIMG8_C0.
44 PA24/A0_3 bidirectional GPIO PA24 or ADC0 analog input channel 3. Muxable to UART2_RX, SPI0_CS2, TIMA0_C3N, TIMG0_C1, UART3_RTS, TIMG7_C1, TIMA1_C1.
45 PA25/A0_2 bidirectional GPIO PA25 or ADC0 analog input channel 2. Muxable to UART3_RX, SPI1_CS3, TIMG12_C1, TIMA0_C3, TIMA0_C1N.
46 PA26/A0_1/GPAMP_IN+ bidirectional GPIO PA26, ADC0 analog input channel 1, or GPAMP non-inverting input. Muxable to UART3_TX, SPI1_CS0, TIMG8_C0, TIMA_FAL0, TIMG7_C0.
47 PA27/A0_0/RTC_OUT bidirectional GPIO PA27, ADC0 analog input channel 0, or RTC clock output. Muxable to SPI1_CS1, TIMG8_C1, TIMA_FAL2, TIMG7_C1.
48 VCORE power_out Regulated internal core supply output. Bypass with a low-ESR 1µF ceramic capacitor to VSS; do not connect to an external load.
PAD EPAD power_in Exposed thermal pad on the bottom of the VQFN. TI recommends connecting the pad to VSS for both electrical and thermal grounding.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-48(7x7)
Category Embedded Processors & Controllers
Pins 49

Ordering variants

Same part, different packaging or reel option.

  • MSPM0G1107TRGZR
  • MSPM0G1107TRGZT
  • MSPM0G1107TRGZRTPTR
  • MSPM0G1107TRGZRTPT
  • MSPM0G1107TRGZRTPMR
  • MSPM0G1107TRGZRTPM
  • MSPM0G1107TRGZRTRHBR
  • MSPM0G1107TRGZRTRHBT
  • MSPM0G1107TRGZRTDGS28R
  • MSPM0G1107TRGZRTDGS28
  • MSPM0G1107TRGZRTRGER
  • MSPM0G1107TRGZRTRGET

CAD (KiCad official)

  • Symbol: MSPM0G1107TRGZR
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: VQFN-48(7x7) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 2cddc09fb7f556fb, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF