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MSP430G2212IPW20R
Public Unreviewedby Ray
Texas Instruments Microcontrollers (MCU/MPU/SOC), TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430G2212IPW20R
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · TSSOP-20
MSP430G2212IPW20R from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DVCC | power_in | Digital supply voltage. Operating range 1.8 V to 3.6 V referenced to DVSS. Decouple locally with a 100 nF ceramic capacitor to DVSS. |
| 2 | P1.0/TA0CLK/ACLK/CA0 | bidirectional | General-purpose digital I/O with interrupt and configurable pull-up/pull-down. Muxed with Timer0_A external clock input TACLK, ACLK signal output, and Comparator_A+ channel CA0. |
| 3 | P1.1/TA0.0/CA1 | bidirectional | General-purpose digital I/O with interrupt and configurable pull-up/pull-down. Muxed with Timer0_A capture CCI0A input / compare Out0 output and Comparator_A+ channel CA1. |
| 4 | P1.2/TA0.1/CA2 | bidirectional | General-purpose digital I/O with interrupt and configurable pull-up/pull-down. Muxed with Timer0_A capture CCI1A input / compare Out1 output and Comparator_A+ channel CA2. |
| 5 | P1.3/CAOUT/CA3 | bidirectional | General-purpose digital I/O with interrupt and configurable pull-up/pull-down. Muxed with Comparator_A+ output CAOUT and Comparator_A+ channel CA3. |
| 6 | P1.4/SMCLK/TA0.2/CA4/TCK | bidirectional | General-purpose digital I/O with interrupt and pull-up/pull-down. Muxed with SMCLK signal output, Timer0_A capture CCI2A input / compare Out2 output, Comparator_A+ channel CA4, and JTAG TCK. |
| 7 | P1.5/TA0.0/SCLK/CA5/TMS | bidirectional | General-purpose digital I/O with interrupt and pull-up/pull-down. Muxed with Timer0_A compare Out0, USI clock (SCLK: input in I2C mode, in/output in SPI mode), Comparator_A+ channel CA5, and JTAG TMS. |
| 8 | P2.0 | bidirectional | General-purpose digital I/O with interrupt capability and configurable pull-up/pull-down resistor. |
| 9 | P2.1 | bidirectional | General-purpose digital I/O with interrupt capability and configurable pull-up/pull-down resistor. |
| 10 | P2.2 | bidirectional | General-purpose digital I/O with interrupt capability and configurable pull-up/pull-down resistor. |
| 11 | P2.3 | bidirectional | General-purpose digital I/O with interrupt capability and configurable pull-up/pull-down resistor. |
| 12 | P2.4 | bidirectional | General-purpose digital I/O with interrupt capability and configurable pull-up/pull-down resistor. |
| 13 | P2.5 | bidirectional | General-purpose digital I/O with interrupt capability and configurable pull-up/pull-down resistor. |
| 14 | P1.6/TA0.1/SDO/SCL/CA6/TDI/TCLK | bidirectional | General-purpose digital I/O with interrupt and pull-up/pull-down. Muxed with Timer0_A compare Out1, USI SDO (SPI data output), USI SCL (I2C clock), Comparator_A+ channel CA6, and JTAG TDI/TCLK. |
| 15 | P1.7/SDI/SDA/CAOUT/CA7/TDO/TDI | bidirectional | General-purpose digital I/O with interrupt and pull-up/pull-down. Muxed with USI SDI (SPI data input), USI SDA (I2C data), Comparator_A+ output CAOUT, Comparator_A+ channel CA7, and JTAG TDO/TDI. |
| 16 | RST/NMI/SBWTDIO | input | Active-low reset input; also serves as non-maskable interrupt (NMI) input and as the Spy-Bi-Wire data I/O (SBWTDIO) during programming/debug. Requires an external pull-up resistor (typ. 47 kΩ) plus a small capacitor to DVSS for reliable reset. |
| 17 | TEST/SBWTCK | input | Selects JTAG test mode for Port 1 pins; the device protection fuse is connected to TEST. Also serves as the Spy-Bi-Wire test clock input (SBWTCK) during programming and debug. |
| 18 | XOUT/P2.7 | bidirectional | Crystal oscillator output for a 32 kHz watch crystal on LFXT1; alternately usable as GPIO P2.7. |
| 19 | XIN/P2.6/TA0.1 | bidirectional | Crystal oscillator input for LFXT1 (32 kHz watch crystal) or external digital clock source; alternately usable as GPIO P2.6 or Timer0_A compare Out1. |
| 20 | DVSS | power_in | Digital ground reference (0 V). Connect to the board ground plane with a low-inductance path. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
Ordering variants
Same part, different packaging or reel option.
MSP430G2212IPW20RMSP430G2212IPW20RIN20MSP430G2212IPW20RIPW14MSP430G2212IPW20RIRSA16
CAD (KiCad official)
- Symbol:
MSP430G2212IPW20R - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (None pp, sha256
4a95b55c77e49dbf, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).