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MCP2515

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by adom

Microchip stand-alone CAN 2.0B controller with SPI, SOIC-18. 1 Mb/s, 3 TX + 2 RX buffers, 6 filters. Datasheet-verified.

componentinterfacecan-buscan-controllerspisoic-18microchip
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Contents

README

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MCP2515

Microchip Technology · CAN 2.0B controller (SPI) · SOIC-18

A stand-alone CAN controller that adds a full CAN 2.0B bus to any microcontroller over SPI, in a SOIC-18 package. It handles the whole protocol in hardware at up to 1 Mb/s: three transmit buffers with priority, two receive buffers, and six acceptance filters with two masks sort incoming frames so the host MCU only sees the messages it cares about. Pair it with a CAN transceiver such as the MCP2551 or MCP2562 for the physical layer. Interrupt and buffer-full pins signal the host without polling.

Pinout

Pin Name Type Function
1 TXCAN output Transmit output pin to the external CAN transceiver. Drives the CAN bus TX line.
2 RXCAN input Receive input pin from the external CAN transceiver. Samples the CAN bus RX line.
3 CLKOUT/SOF output Clock output pin with programmable prescaler. Alternately configurable as a Start-of-Frame (SOF) signal for CAN bus diagnostics or clocking downstream devices.
4 TX0RTS input Transmit buffer TXB0 Request-to-Send input, or general-purpose digital input. Internal 100 kΩ pull-up to VDD.
5 TX1RTS input Transmit buffer TXB1 Request-to-Send input, or general-purpose digital input. Internal 100 kΩ pull-up to VDD.
6 TX2RTS input Transmit buffer TXB2 Request-to-Send input, or general-purpose digital input. Internal 100 kΩ pull-up to VDD.
7 OSC2 output Oscillator output for the crystal/resonator connected between OSC1 and OSC2.
8 OSC1 input Oscillator input for a crystal/resonator, or external clock source input.
9 VSS power_in Ground reference for logic and I/O pins. Connect to system ground (0 V).
10 RX1BF output Receive buffer RXB1 interrupt pin, or general-purpose digital output. Configurable via BFPCTRL register.
11 RX0BF output Receive buffer RXB0 interrupt pin, or general-purpose digital output. Configurable via BFPCTRL register.
12 INT output Active-low interrupt output pin. Asserted when any of the enabled interrupt sources (via CANINTE register) becomes active.
13 SCK input SPI clock input from the host MCU. Supports SPI modes 0,0 and 1,1 up to 10 MHz.
14 SI input SPI data input (MOSI) from the host MCU. Data sampled on the SCK edge selected by SPI mode.
15 SO output SPI data output (MISO) to the host MCU. High-impedance when CS is deasserted.
16 CS input Active-low SPI chip-select input from the host MCU. Enables the SPI slave interface.
17 RESET input Active-low device reset input. Puts the device into Configuration mode and resets all registers.
18 VDD power_in Positive supply for logic and I/O pins. Operating range 2.7 V to 5.5 V.

Key specifications

Parameter Value
Type Stand-alone CAN controller
Protocol CAN 2.0B, up to 1 Mb/s
Host interface SPI (up to 10 MHz)
TX buffers 3 (with priority)
RX buffers 2
Message filtering 6 filters + 2 masks
Clock external crystal on OSC1/OSC2
Package SOIC-18

Ordering variants

Same part, different packaging or reel option.

  • MCP2515-I/SO (SOIC-18)
  • MCP2515T-I/SO (SOIC-18, tape & reel)

CAD (KiCad official)

  • Symbol: Interface_CAN_LIN:MCP2515-xSO
  • Footprint: Package_SO:SOIC-18W_7.5x11.6mm_P1.27mm
  • 3D model: SOIC-18W (KiCad packages3D)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Technology datasheet (94 pp, sha256 f2cf92a2d1ed42b2, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF