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Contents

README

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MC74VHC1G00DFT2G

onsemi · Gates · SOT-353-5

MC74VHC1G00DFT2G from onsemi, in a SOT-353-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN B input Logic input B of the 2-input NAND gate. High-impedance CMOS input, VIH = 3.15 V min at VCC = 4.5 V; tolerates up to 7.0 V regardless of VCC. Input leakage ±1 µA max.
2 IN A input Logic input A of the 2-input NAND gate. High-impedance CMOS input, VIH = 3.15 V min at VCC = 4.5 V; tolerates up to 7.0 V regardless of VCC. Input leakage ±1 µA max.
3 GND power_in Ground reference (0 V) for the device.
4 OUT Y output NAND gate output Y = NOT(A AND B). Push-pull CMOS output with balanced propagation delays; VOH ≥ 3.94 V at IOH = -8 mA (VCC = 4.5 V), VOL ≤ 0.36 V at IOL = 8 mA. Max output sink/source current ±12.5 mA.
5 VCC power_in Positive supply voltage input. Recommended operating range 2.0 V to 5.5 V; absolute maximum -0.5 V to +7.0 V. Quiescent supply current 1 µA max at 25 °C.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-353-5
Category Logic
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • MC74VHC1G00DFT2GDFT1G
  • MC74VHC1G00DFT2G
  • MC74VHC1G00DFT2GNLVVHC1G00DFT2G
  • MC74VHC1G00DFT2GDTT1G
  • MC74VHC1G00DFT2GNLVVHC1G00DTT1G

CAD (KiCad official)

  • Symbol: MC74VHC1G00DFT2G
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353-5 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (6 pp, sha256 2a8f62b10300c50a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF