MC74LVX08DTR2G from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	A0	input	Gate 0 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). VIH min = 2.0 V at VCC = 3.0 V; VIL max = 0.8 V. Input leakage +/-1 uA max.
2	B0	input	Gate 0 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A0 through a 2-input AND to drive O0.
3	O0	output	Gate 0 output = A0 AND B0. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V). Max DC output current +/-25 mA per pin.
4	A1	input	Gate 1 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating).
5	B1	input	Gate 1 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A1 through a 2-input AND to drive O1.
6	O1	output	Gate 1 output = A1 AND B1. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V).
7	GND	power_in	Ground reference (0 V). Return for VCC and all logic signals.
8	O3	output	Gate 3 output = A3 AND B3. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V).
9	B3	input	Gate 3 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A3 through a 2-input AND to drive O3.
10	A3	input	Gate 3 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating).
11	O2	output	Gate 2 output = A2 AND B2. Push-pull CMOS output; VOH >= 2.48 V @ IOH = -4 mA, VOL <= 0.44 V @ IOL = 4 mA (VCC = 3.0 V).
12	B2	input	Gate 2 data input B. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating). Combined with A2 through a 2-input AND to drive O2.
13	A2	input	Gate 2 data input A. CMOS logic input, 5 V tolerant (up to 7.0 V DC input voltage rating).
14	VCC	power_in	Positive supply voltage. Recommended operating range 2.0 V to 3.6 V; absolute maximum -0.5 V to +7.0 V. Quiescent supply current 2 uA (max) at 25 C. Bypass with a 0.1 uF ceramic capacitor to GND close to the pin.

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	TSSOP-14
Category	Logic
Pins	14

Ordering variants

Same part, different packaging or reel option.

MC74LVX08DTR2G
MC74LVX08DTR2GDTG
MC74LVX08DTR2GDR2G

CAD (KiCad official)

Symbol: MC74LVX08DTR2G
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (5 pp, sha256 7bcb7c39dade52c5, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF