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MC74HCT366ADTR2G

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by Ray

onsemi Buffers, Drivers, Receivers, Transceivers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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MC74HCT366ADTR2G

onsemi · Buffers, Drivers, Receivers, Transceivers · TSSOP-16

MC74HCT366ADTR2G from onsemi, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output Enable 1 (active low). When either OE1 or OE2 is HIGH, all six Y outputs are placed into the high-impedance state. Both enables must be LOW for outputs to be active. LSTTL-compatible input.
2 A0 input Buffer 0 data input. Inverted and driven to Y0 when enables are active. LSTTL-compatible input; max input leakage 1.0 µA. Unused inputs must be tied to VCC or GND.
3 Y0 tri_state Buffer 0 3-state inverting output (Y0 = /A0 when enabled; Hi-Z when either OE is HIGH). Drives up to 15 LSTTL loads; typical output current spec 7.8 mA at VCC=6.0 V.
4 A1 input Buffer 1 data input. Inverted and driven to Y1 when enables are active. LSTTL-compatible input.
5 Y1 tri_state Buffer 1 3-state inverting output (Y1 = /A1 when enabled; Hi-Z when either OE is HIGH).
6 A2 input Buffer 2 data input. Inverted and driven to Y2 when enables are active. LSTTL-compatible input.
7 Y2 tri_state Buffer 2 3-state inverting output (Y2 = /A2 when enabled; Hi-Z when either OE is HIGH).
8 GND power_in Ground reference (0 V). All input/output voltages referenced to GND. Max DC supply current through VCC/GND is ±50 mA.
9 Y3 tri_state Buffer 3 3-state inverting output (Y3 = /A3 when enabled; Hi-Z when either OE is HIGH).
10 A3 input Buffer 3 data input. Inverted and driven to Y3 when enables are active. LSTTL-compatible input.
11 Y4 tri_state Buffer 4 3-state inverting output (Y4 = /A4 when enabled; Hi-Z when either OE is HIGH).
12 A4 input Buffer 4 data input. Inverted and driven to Y4 when enables are active. LSTTL-compatible input.
13 Y5 tri_state Buffer 5 3-state inverting output (Y5 = /A5 when enabled; Hi-Z when either OE is HIGH).
14 A5 input Buffer 5 data input. Inverted and driven to Y5 when enables are active. LSTTL-compatible input.
15 OE2 input Output Enable 2 (active low). When either OE1 or OE2 is HIGH, all six Y outputs are placed into the high-impedance state. Both enables must be LOW for outputs to be active.
16 VCC power_in Positive supply voltage. Recommended operating range 2.0 to 6.0 V (absolute max 7.0 V). Quiescent supply current 4 µA typical at 25 °C, 6.0 V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • MC74HCT366ADTR2G
  • MC74HCT366ADTR2GNLVHCT366ADTRG
  • MC74HCT366ADG
  • MC74HCT366ADR2G

CAD (KiCad official)

  • Symbol: MC74HCT366ADTR2G
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (None pp, sha256 e9aa870c39c8ba91, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF