MC74HCT244ADTR2G from onsemi, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	~{ENABLE_A}	input	Active-low output enable for bank A (drives YA1-YA4). When low, YA outputs follow A1-A4; when high, YA outputs are in high-impedance state.
2	A1	input	Bank A data input 1, LSTTL/CMOS compatible. Buffered noninverting to YA1 when ~ENABLE_A is low. Max input leakage 1 uA.
3	YB4	tri_state	Bank B 3-state noninverting output 4, driven from B4. High-impedance when ~ENABLE_B is high. Drives 15 LSTTL loads.
4	A2	input	Bank A data input 2, LSTTL/CMOS compatible. Buffered noninverting to YA2 when ~ENABLE_A is low.
5	YB3	tri_state	Bank B 3-state noninverting output 3, driven from B3. High-impedance when ~ENABLE_B is high.
6	A3	input	Bank A data input 3, LSTTL/CMOS compatible. Buffered noninverting to YA3 when ~ENABLE_A is low.
7	YB2	tri_state	Bank B 3-state noninverting output 2, driven from B2. High-impedance when ~ENABLE_B is high.
8	A4	input	Bank A data input 4, LSTTL/CMOS compatible. Buffered noninverting to YA4 when ~ENABLE_A is low.
9	YB1	tri_state	Bank B 3-state noninverting output 1, driven from B1. High-impedance when ~ENABLE_B is high.
10	GND	power_in	Device ground reference (0 V). All voltages are referenced to this pin.
11	B1	input	Bank B data input 1, LSTTL/CMOS compatible. Buffered noninverting to YB1 when ~ENABLE_B is low.
12	YA4	tri_state	Bank A 3-state noninverting output 4, driven from A4. High-impedance when ~ENABLE_A is high.
13	B2	input	Bank B data input 2, LSTTL/CMOS compatible. Buffered noninverting to YB2 when ~ENABLE_B is low.
14	YA3	tri_state	Bank A 3-state noninverting output 3, driven from A3. High-impedance when ~ENABLE_A is high.
15	B3	input	Bank B data input 3, LSTTL/CMOS compatible. Buffered noninverting to YB3 when ~ENABLE_B is low.
16	YA2	tri_state	Bank A 3-state noninverting output 2, driven from A2. High-impedance when ~ENABLE_A is high.
17	B4	input	Bank B data input 4, LSTTL/CMOS compatible. Buffered noninverting to YB4 when ~ENABLE_B is low.
18	YA1	tri_state	Bank A 3-state noninverting output 1, driven from A1. High-impedance when ~ENABLE_A is high.
19	~{ENABLE_B}	input	Active-low output enable for bank B (drives YB1-YB4). When low, YB outputs follow B1-B4; when high, YB outputs are in high-impedance state.
20	VCC	power_in	Positive supply, 4.5-5.5 V recommended (absolute max -0.5 to +7 V). Bypass with a local decoupling capacitor to GND.

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	TSSOP-20
Category	Logic
Pins	20

Ordering variants

Same part, different packaging or reel option.

MC74HCT244ADTR2G
MC74HCT244ADTR2GDWG
MC74HCT244ADTR2GDWR2G

CAD (KiCad official)

Symbol: MC74HCT244ADTR2G
Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
3D model: TSSOP-20 (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (7 pp, sha256 ecd7a0677efa2954, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF