MC74HC126ADR2G
Public Unreviewedby Ray
onsemi Buffer/Driver/Transceiver, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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README
markdownMC74HC126ADR2G
onsemi · Buffer/Driver/Transceiver · SOIC-14
MC74HC126ADR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OE1 | input | Active-high output enable for buffer 1. When high, output Y1 follows input A1; when low, Y1 is in high-impedance state. |
| 2 | A1 | input | Data input for buffer 1. CMOS-compatible logic input, buffered non-inverting to output Y1. |
| 3 | Y1 | tri_state | 3-state noninverting buffer output 1. Drives up to 15 LSTTL loads; high-impedance when OE1 is low. |
| 4 | OE2 | input | Active-high output enable for buffer 2. When high, output Y2 follows input A2; when low, Y2 is in high-impedance state. |
| 5 | A2 | input | Data input for buffer 2. CMOS-compatible logic input, buffered non-inverting to output Y2. |
| 6 | Y2 | tri_state | 3-state noninverting buffer output 2. Drives up to 15 LSTTL loads; high-impedance when OE2 is low. |
| 7 | GND | power_in | Ground reference (0 V). Common return for supply and I/O. |
| 8 | Y3 | tri_state | 3-state noninverting buffer output 3. Drives up to 15 LSTTL loads; high-impedance when OE3 is low. |
| 9 | A3 | input | Data input for buffer 3. CMOS-compatible logic input, buffered non-inverting to output Y3. |
| 10 | OE3 | input | Active-high output enable for buffer 3. When high, output Y3 follows input A3; when low, Y3 is in high-impedance state. |
| 11 | Y4 | tri_state | 3-state noninverting buffer output 4. Drives up to 15 LSTTL loads; high-impedance when OE4 is low. |
| 12 | A4 | input | Data input for buffer 4. CMOS-compatible logic input, buffered non-inverting to output Y4. |
| 13 | OE4 | input | Active-high output enable for buffer 4. When high, output Y4 follows input A4; when low, Y4 is in high-impedance state. |
| 14 | VCC | power_in | Positive supply voltage, 2.0 V to 6.0 V (absolute max 7.0 V). Bypass with a 0.1 uF ceramic capacitor close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
MC74HC126ADGMC74HC126ADR2GMC74HC126ADR2GNLV74HC126ADR2GMC74HC126ADTR2GMC74HC126ADR2GNLV74HC126ADTR2G
CAD (KiCad official)
- Symbol:
MC74HC126ADR2G - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
mc74hc126adr2g.step |
195 KB | You want the bare part, or you mark your own boards. |
mc74hc126adr2g-etched.step |
2.8 MB | You want the part with MC74HC126ADR2G already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 716 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (9 pp, sha256
7fc74019b728976b, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).