component
mc74hc02adr2g
Public Unreviewedby Ray
onsemi Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownMC74HC02ADR2G
onsemi · Gates · SOIC-14
MC74HC02ADR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Y1 | output | Output of NOR gate 1 (Y1 = NOT(A1 + B1)). CMOS push-pull output; VOH >= VCC-0.1 V (Iout <= 20 uA) and VOL <= 0.1 V; drives 10 LSTTL loads (Iout up to +/-5.2 mA at VCC = 6.0 V). |
| 2 | A1 | input | Input A of NOR gate 1. High-impedance CMOS input; VIH >= 0.7VCC (e.g., 3.15 V at VCC = 4.5 V), VIL <= 0.3VCC, input leakage +/-1.0 uA max. Unused inputs must be tied to VCC or GND. |
| 3 | B1 | input | Input B of NOR gate 1. High-impedance CMOS input; same characteristics as A1. Unused inputs must be tied to VCC or GND. |
| 4 | Y2 | output | Output of NOR gate 2 (Y2 = NOT(A2 + B2)). CMOS push-pull output with the same drive/level specs as Y1. |
| 5 | A2 | input | Input A of NOR gate 2. High-impedance CMOS input; same characteristics as A1. |
| 6 | B2 | input | Input B of NOR gate 2. High-impedance CMOS input; same characteristics as A1. |
| 7 | GND | power_in | Ground reference (0 V). All input/output voltages are referenced to this pin. |
| 8 | A3 | input | Input A of NOR gate 3. High-impedance CMOS input; same characteristics as A1. |
| 9 | B3 | input | Input B of NOR gate 3. High-impedance CMOS input; same characteristics as A1. |
| 10 | Y3 | output | Output of NOR gate 3 (Y3 = NOT(A3 + B3)). CMOS push-pull output with the same drive/level specs as Y1. |
| 11 | A4 | input | Input A of NOR gate 4. High-impedance CMOS input; same characteristics as A1. |
| 12 | B4 | input | Input B of NOR gate 4. High-impedance CMOS input; same characteristics as A1. |
| 13 | Y4 | output | Output of NOR gate 4 (Y4 = NOT(A4 + B4)). CMOS push-pull output with the same drive/level specs as Y1. |
| 14 | VCC | power_in | Positive supply voltage. Recommended operating range 2.0 to 6.0 V (absolute max 7.0 V referenced to GND). Bypass with a local ceramic capacitor close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
MC74HC02ADR2GDGMC74HC02ADR2GMC74HC02ADR2GNLV...DR2GMC74HC02ADR2GDTR2GMC74HC02ADR2GNLV...DTR2G
CAD (KiCad official)
- Symbol:
MC74HC02ADR2G - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (None pp, sha256
0b69a9e3feefc4f5, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).