MC14069UBDR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN 1	input	Inverter 1 input. CMOS logic input with triple diode protection; must be constrained to VSS ≤ Vin ≤ VDD. Unused inputs must be tied to VSS or VDD.
2	OUT 1	output	Inverter 1 output (inverted logic level of IN 1). CMOS push-pull output capable of driving two low-power TTL loads or one low-power Schottky TTL load.
3	IN 2	input	Inverter 2 input. CMOS logic input with triple diode protection; must be constrained to VSS ≤ Vin ≤ VDD. Unused inputs must be tied to VSS or VDD.
4	OUT 2	output	Inverter 2 output (inverted logic level of IN 2). CMOS push-pull output.
5	IN 3	input	Inverter 3 input. CMOS logic input with triple diode protection; must be constrained to VSS ≤ Vin ≤ VDD. Unused inputs must be tied to VSS or VDD.
6	OUT 3	output	Inverter 3 output (inverted logic level of IN 3). CMOS push-pull output.
7	VSS	power_in	Negative supply / ground reference. All voltages in the datasheet are referenced to VSS.
8	OUT 4	output	Inverter 4 output (inverted logic level of IN 4). CMOS push-pull output.
9	IN 4	input	Inverter 4 input. CMOS logic input with triple diode protection; must be constrained to VSS ≤ Vin ≤ VDD. Unused inputs must be tied to VSS or VDD.
10	OUT 5	output	Inverter 5 output (inverted logic level of IN 5). CMOS push-pull output.
11	IN 5	input	Inverter 5 input. CMOS logic input with triple diode protection; must be constrained to VSS ≤ Vin ≤ VDD. Unused inputs must be tied to VSS or VDD.
12	OUT 6	output	Inverter 6 output (inverted logic level of IN 6). CMOS push-pull output.
13	IN 6	input	Inverter 6 input. CMOS logic input with triple diode protection; must be constrained to VSS ≤ Vin ≤ VDD. Unused inputs must be tied to VSS or VDD.
14	VDD	power_in	Positive supply. Rated supply range 3.0 to 18 Vdc (absolute max −0.5 to +18.0 V).

Key specifications

Parameter	Value
Manufacturer	onsemi
Package	SOIC-14
Category	Logic
Pins	14

Ordering variants

Same part, different packaging or reel option.

MC14069UBDR2GDG
MC14069UBDR2G
MC14069UBDR2GDTR2G
MC14069UBDR2GFELG

CAD (KiCad official)

Symbol: MC14069UBDR2G
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`mc14069ubdr2g.step`	195 KB	You want the bare part, or you mark your own boards.
`mc14069ubdr2g-etched.step`	3.2 MB	You want the part with `MC14069UBDR2G` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 773 faces against 237 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: onsemi datasheet (6 pp, sha256 cb55d2717aeb5369, retrieved 2026-08-17, tier: manufacturer)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF