component
MC14001UBDR2G
Public Unreviewedby Ray
onsemi Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC14001UBDR2G
onsemi · Logic Gates · SOIC-14
MC14001UBDR2G from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1A | input | Gate A input 1. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS for NOR gates. |
| 2 | IN2A | input | Gate A input 2. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 3 | OUTA | output | Gate A output (NOR of IN1A, IN2A). Capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. |
| 4 | OUTB | output | Gate B output (NOR of IN1B, IN2B). Capable of driving two low-power TTL loads or one low-power Schottky TTL load. |
| 5 | IN1B | input | Gate B input 1. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 6 | IN2B | input | Gate B input 2. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 7 | VSS | power_in | Negative supply / ground reference. All voltages referenced to VSS. Operating supply range VDD-VSS = 3.0 to 18 Vdc; absolute max VDD = -0.5 to +18.0 V referenced to VSS. |
| 8 | IN1C | input | Gate C input 1. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 9 | IN2C | input | Gate C input 2. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 10 | OUTC | output | Gate C output (NOR of IN1C, IN2C). Capable of driving two low-power TTL loads or one low-power Schottky TTL load. |
| 11 | OUTD | output | Gate D output (NOR of IN1D, IN2D). Capable of driving two low-power TTL loads or one low-power Schottky TTL load. |
| 12 | IN1D | input | Gate D input 1. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 13 | IN2D | input | Gate D input 2. CMOS logic input, VDD range 3.0 to 18 Vdc. Double-diode protected. Unused inputs must be tied to VSS. |
| 14 | VDD | power_in | Positive supply. Operating VDD-VSS = 3.0 to 18 Vdc; absolute max +18.0 V. Quiescent current IDD typ 0.5-1.5 uA at 25C over 5-15 Vdc. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
MC14001UBDR2G
CAD (KiCad official)
- Symbol:
MC14001UBDR2G - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (None pp, sha256
01d0f7fc7ff3a9ae, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).