component
MC14001UBDG
Public Unreviewedby Ray
onsemi Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC14001UBDG
onsemi · Logic Gates · SOIC-14
MC14001UBDG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1A | input | Input 1 of NOR gate A. CMOS logic input; VIH >= 4.0/8.0/12.5 V at VDD = 5/10/15 V, VIL <= 1.0/2.0/2.5 V at same VDD. Input current typically ~10 fA (max +/-0.1 uA at 25 C). |
| 2 | IN2A | input | Input 2 of NOR gate A. CMOS logic input with double-diode ESD protection to VDD/VSS. Unused NOR-gate inputs must be tied to VSS. |
| 3 | OUTA | output | Output of NOR gate A (= NOT(IN1A OR IN2A)). CMOS push-pull output; VOH >= VDD-0.05 V, VOL <= 0.05 V (Vin = VDD or 0). Drives 2 LSTTL loads / 1 LS Schottky TTL load. |
| 4 | OUTB | output | Output of NOR gate B (= NOT(IN1B OR IN2B)). CMOS push-pull output; source current typ 1.7 mA at VDD=5 V / VOH=2.5 V, sink current typ 0.88 mA at VDD=5 V / VOL=0.4 V (25 C). |
| 5 | IN1B | input | Input 1 of NOR gate B. High-impedance CMOS input, typ Cin = 5 pF. |
| 6 | IN2B | input | Input 2 of NOR gate B. CMOS logic input with double-diode ESD protection; Vin must remain within VSS <= Vin <= VDD. |
| 7 | VSS | power_in | Negative supply / ground reference for all four gates. Typically tied to 0 V. Maximum VDD-VSS supply differential is 18 V. |
| 8 | IN1C | input | Input 1 of NOR gate C. CMOS logic input; see VIL/VIH table for switching thresholds. |
| 9 | IN2C | input | Input 2 of NOR gate C. CMOS logic input with double-diode ESD protection to VDD/VSS. |
| 10 | OUTC | output | Output of NOR gate C (= NOT(IN1C OR IN2C)). CMOS push-pull output. |
| 11 | OUTD | output | Output of NOR gate D (= NOT(IN1D OR IN2D)). CMOS push-pull output. |
| 12 | IN1D | input | Input 1 of NOR gate D. High-impedance CMOS input. |
| 13 | IN2D | input | Input 2 of NOR gate D. CMOS logic input with double-diode ESD protection. |
| 14 | VDD | power_in | Positive supply for all four NOR gates. DC supply range 3.0 V to 18 V (absolute max -0.5 V to +18.0 V referenced to VSS). Quiescent current typ 0.5 nA / max 0.25 uA at VDD = 5 V (25 C). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Ordering variants
Same part, different packaging or reel option.
MC14001UBDGMC14001UBDGDR2G
CAD (KiCad official)
- Symbol:
MC14001UBDG - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (8 pp, sha256
9a291d8cd893b377, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).