M95512-WMN6TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S	input	Chip Select (active-low). Driven Low to select the device and start any instruction; Low->High deselects and places Q in high impedance. Edge-sensitive at power-up: a falling edge must be seen after VCC reaches POR before the first operation.
2	Q	output	Serial Data Output (MISO). Data is shifted out MSB-first on the falling edge of Serial Clock (C). High impedance when the device is deselected or in Hold.
3	W	input	Write Protect (active-low). Combined with the SRWD bit of the Status Register to enter the Hardware Protected Mode (HPM), freezing the size of the write-protected memory area defined by BP1/BP0. Must be driven High or Low and stable during all write instructions.
4	VSS	power_in	Ground reference for supply and all logic signals.
5	D	input	Serial Data Input (MOSI). Instructions, addresses and write data are shifted in MSB-first and latched on the rising edge of Serial Clock (C).
6	C	input	Serial Clock. Provides timing for the serial interface up to 10 MHz. Input data on D is latched on the rising edge; output data on Q changes after the falling edge. Supports SPI modes (CPOL,CPHA) = (0,0) or (1,1).
7	HOLD	input	Hold (active-low). Pauses serial communications without deselecting the device. During Hold, Q is high impedance and D and C are Don't Care. Device must be selected (S Low) to enter Hold.
8	VCC	power_in	Supply voltage. 2.5 V to 5.5 V for M95512-W ('-W' suffix in the MPN). A stable, valid VCC above the Power-On-Reset threshold must be applied before any logic signal is applied.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	SOIC-8
Category	Memory
Pins	8

Ordering variants

Same part, different packaging or reel option.

M95512-WMN6TP
M95512-WMN6TPDW6
M95512-WMN6TPDW6T
M95512-WMN6TPDW6TP

CAD (KiCad official)

Symbol: M95512-WMN6TP
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)

3D model downloads

Two STEP files. Same geometry, different body top:

File	Size	Use it when
`m95512-wmn6tp.step`	122 KB	You want the bare part, or you mark your own boards.
`m95512-wmn6tp-etched.step`	2.3 MB	You want the part with `M95512-WMN6TP` already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 579 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (31 pp, sha256 9ce19768858181f2, retrieved 2026-08-17, tier: lcsc)
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF