component
M95512-RMN6TP
Public Unreviewedby Ray
STMicroelectronics EEPROM, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownM95512-RMN6TP
STMicroelectronics · EEPROM · SOIC-8
M95512-RMN6TP from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | input | Chip Select (active low). Driving S low selects the device and places it in Active Power mode; when S is high the device is deselected, Q goes high-impedance, and the device enters Standby Power mode (unless an internal write cycle is in progress). A falling edge on S is required after power-up before any instruction. |
| 2 | Q | output | Serial Data Output (MISO). Data is shifted out on the falling edge of Serial Clock (C). Output is high-impedance when the device is deselected or held. |
| 3 | W | input | Write Protect (active low). When W is driven low with SRWD=1 in the Status Register, the Status Register is hardware-write-protected, freezing the currently configured protected memory area. Tie to VCC through a pull-up if unused. |
| 4 | VSS | power_in | Ground reference for all signals and supply. |
| 5 | D | input | Serial Data Input (MOSI). Instructions, addresses, and write data are latched on the rising edge of Serial Clock (C). |
| 6 | C | input | Serial Clock (SCK). Provides the timing for the serial interface: D is latched on the rising edge and Q changes on the falling edge. Supports SPI Modes 0 and 3, up to 16 MHz. |
| 7 | HOLD | input | Hold input (active low). Pauses any serial communication with the device without deselecting it; while HOLD is asserted, Q is high-impedance and D and C are Don't Care. Tie high (to VCC) through a pull-up if unused. |
| 8 | VCC | power_in | Supply voltage. For the M95512-R variant, VCC = 1.8 V to 5.5 V. A 100 nF decoupling capacitor between VCC and VSS is recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
Ordering variants
Same part, different packaging or reel option.
M95512-RMN6TPM95512-RMN6PM95512-RMN6TPWMN6TPM95512-RMN6TPWMN6PM95512-RMN6TPRDW6TPM95512-RMN6TPWDW6TPM95512-RMN6TPRMC6TPM95512-RMN6TPWMC6TPM95512-RMN6TPDFMC6TPM95512-RMN6TPDFCS6TP/K
CAD (KiCad official)
- Symbol:
M95512-RMN6TP - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (50 pp, sha256
b37ea33905d9cf57, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).