component
lp7801tspf
Public Unreviewedby Ray
LOWPOWER Battery Management, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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README
markdownLP7801TSPF
LOWPOWER · Battery Management · ESOP-8
LP7801TSPF from LOWPOWER, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | ISET | input | Charging current programming pin. Connect a resistor from ISET to GND to set the constant-current charging current per ICC = 1750 × VISET/RISET where VISET = 1 V (e.g. RISET = 17.5 kΩ → 100 mA; RISET = 3.4 kΩ → 515 mA). |
| 2 | VIN | power_in | Linear charger input supply. Recommended operating range 4.5 V to 5.8 V; tolerates up to 36 V absolute maximum. Input over-voltage protection threshold is 6.3 V (rising) with 400 mV hysteresis; UVLO is 3.3 V. Decouple with a 1 µF capacitor to GND. |
| 3 | BAT | bidirectional | Linear charger output to the Li-ion battery and input to the boost converter. Regulates to VFLOAT = 4.20 V (LP7801TSPF) or 4.35 V (LP7801TSPF-435). Charging current up to 1 A; auto-recharge threshold VFLOAT − 150 mV. Decouple with 10 µF capacitor to GND. |
| 4 | SW | output | Switching node of the synchronous boost converter. Connect a 2.2 µH inductor from BAT to SW. Absolute maximum −0.3 V to +9 V. Switch current limit typ. 1 A; high-side/low-side MOS RON ≈ 160 mΩ/220 mΩ. |
| 5 | VOUT | power_out | Regulated boost converter output, fixed 5.1 V (Typ.), up to 500 mA. Decouple with 2 × 10 µF ceramic capacitors to GND. Discharged through an internal 2 kΩ resistor to 0 V when EN is low. |
| 6 | EN | input | Active-high enable input for the boost converter. VIH ≥ 1.4 V enables the converter, VIL ≤ 0.4 V disables it and engages the 2 kΩ output discharge. Leakage 0.01 µA at VEN = 5 V. |
| 7 | CHRG | output | Open-drain charge status indicator, capable of driving an LED. Strong pull-down (~10 mA sink, VOL ≤ 0.5 V at 5 mA) during a charge cycle; high impedance when the cycle terminates or when VIN is below 4.5 V / above the OVP threshold. Leakage 5 µA at VCHRG = 5 V, VBAT = 4.3 V. |
| 8 | TS | input | Battery temperature sense input. Connect via a resistor divider (R1, R2) with an external NTC to VIN. Charging is allowed only when the TS voltage is between VTS_L (30 %·VIN, rising) and VTS_H (60 %·VIN, falling), with 30 mV hysteresis. Tie via equal R1/R2 (TS ≈ 50 %·VIN) if thermal protection is unused. |
| 9 | GND | power_in | Ground / exposed thermal pad on the bottom of the ESOP-8 package. Must be soldered to the PCB ground plane for thermal dissipation (θJA ≈ 50 °C/W on 2S2P JEDEC PCB) and electrical return. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
LP7801TSPFLP7801TSPF-435
CAD (KiCad official)
- Symbol:
LP7801TSPF - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (None pp, sha256
74a45fe9ef01332e, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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