component
LP4056HSPF
Public Unreviewedby Ray
LOWPOWER Battery Management, ESOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLP4056HSPF
LOWPOWER · Battery Management · ESOP-8
LP4056HSPF from LOWPOWER, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connect. Leave floating. |
| 2 | ISET | passive | Charge current program and monitor pin. A 1% resistor RISET from ISET to ground programs the charge current per IBAT = 1000V/RISET. Servos to 1.0V in constant-current mode; ISET voltage may be read to monitor charge current. |
| 3 | VSS | power_in | Device ground / system ground return. |
| 4 | VIN | power_in | Input power supply, 4.5V to 6.5V (typ. 5V, absolute max 8V). Connect to wall adapter or USB source; decouple with 10uF ceramic. |
| 5 | BAT | power_out | Charger output to the single-cell Li-Ion battery. Regulated float voltage 4.2V ±1%; delivers up to 1000mA (RISET = 1k). Decouple with 10uF ceramic. |
| 6 | STAT2 | output | Open-drain charge status output (complement of STAT1). Pulled HIGH via external pull-up while charging, pulled LOW by internal N-MOSFET when the charge cycle completes. |
| 7 | STAT1 | output | Open-drain charge status output. Pulled LOW by internal N-MOSFET while charging, released HIGH via external pull-up when the charge cycle completes. |
| 8 | EN | input | Chip enable. Charging is enabled when EN is floating or pulled high (VIH >= 1.4V). Pulling EN low (VIL <= 0.4V) disables charging (shutdown). |
| 9 | GND | power_in | Exposed thermal pad on ESOP-8 bottom. Solder to a large PCB ground plane for heat dissipation; electrically tied to GND/VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | ESOP-8 |
| Category | PMIC |
| Pins | 9 |
Ordering variants
Same part, different packaging or reel option.
LP4056HSPF
CAD (KiCad official)
- Symbol:
LP4056HSPF - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (7 pp, sha256
3f9269ef6f84936a, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).